From 2fe596e6778ca1e9bc5a1f0f585604d000297426 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Thu, 31 Jan 2019 14:31:35 +0100 Subject: soc/intel/apl: Implement power-failure-state API Needed some Makefile changes to be able to compile for SMM. Change-Id: Ibf218b90088a45349c54f4b881e895bb852e88bb Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/coreboot/+/31352 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Furquan Shaikh --- src/soc/intel/apollolake/Makefile.inc | 1 + src/soc/intel/apollolake/include/soc/pm.h | 1 + src/soc/intel/apollolake/pmc.c | 20 ++++++++++++++++++++ src/soc/intel/common/block/fast_spi/Makefile.inc | 2 +- 4 files changed, 23 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 6fd0822109..60b1a3c4f5 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -39,6 +39,7 @@ romstage-y += reset.c romstage-y += spi.c smm-y += mmap_boot.c +smm-y += pmc.c smm-y += pmutil.c smm-y += smihandler.c smm-y += spi.c diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h index d3538342b0..d0b0421561 100644 --- a/src/soc/intel/apollolake/include/soc/pm.h +++ b/src/soc/intel/apollolake/include/soc/pm.h @@ -172,6 +172,7 @@ #define SRS (1 << 20) #define MS4V (1 << 18) #define RPS (1 << 2) +#define SLEEP_AFTER_POWER_FAIL (1 << 0) #define GEN_PMCON1_CLR1_BITS (COLD_BOOT_STS | COLD_RESET_STS | \ WARM_RESET_STS | GLOBAL_RESET_STS | \ SRS | MS4V) diff --git a/src/soc/intel/apollolake/pmc.c b/src/soc/intel/apollolake/pmc.c index 33fc45728f..872a94be19 100644 --- a/src/soc/intel/apollolake/pmc.c +++ b/src/soc/intel/apollolake/pmc.c @@ -92,6 +92,24 @@ static void set_slp_s3_assertion_width(int width_usecs) write32((void *)gen_pmcon3, reg); } +void pmc_soc_set_afterg3_en(const bool on) +{ + void *const gen_pmcon1 = (void *)(soc_read_pmc_base() + GEN_PMCON1); + uint32_t reg32; + + reg32 = read32(gen_pmcon1); + if (on) + reg32 &= ~SLEEP_AFTER_POWER_FAIL; + else + reg32 |= SLEEP_AFTER_POWER_FAIL; + write32(gen_pmcon1, reg32); +} + +void pmc_soc_restore_power_failure(void) +{ + pmc_set_power_failure_state(false); +} + void pmc_soc_init(struct device *dev) { const struct soc_intel_apollolake_config *cfg = config_of(dev); @@ -108,4 +126,6 @@ void pmc_soc_init(struct device *dev) /* Now that things have been logged clear out the PMC state. */ pmc_clear_prsts(); + + pmc_set_power_failure_state(true); } diff --git a/src/soc/intel/common/block/fast_spi/Makefile.inc b/src/soc/intel/common/block/fast_spi/Makefile.inc index 9c75f3bc46..e5b50aa0bf 100644 --- a/src/soc/intel/common/block/fast_spi/Makefile.inc +++ b/src/soc/intel/common/block/fast_spi/Makefile.inc @@ -13,8 +13,8 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c -ifeq ($(CONFIG_SPI_FLASH_SMM),y) smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c +ifeq ($(CONFIG_SPI_FLASH_SMM),y) smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c endif -- cgit v1.2.3