From 2dce9235244c15efa7c34762a0c47b1fa211ffad Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 9 Jan 2019 08:43:09 +0100 Subject: mb: Move timestamp_add_now to northbridge/amd/amdfam10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also remove some commented code. Change-Id: If2e91ad871b14b305e2181194d77b100e72f5763 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/30771 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Angel Pons --- src/mainboard/advansus/a785e-i/romstage.c | 3 --- src/mainboard/amd/bimini_fam10/romstage.c | 3 --- src/mainboard/amd/mahogany_fam10/romstage.c | 14 -------------- src/mainboard/amd/serengeti_cheetah_fam10/romstage.c | 3 --- src/mainboard/amd/tilapia_fam10/romstage.c | 3 --- src/mainboard/asus/kcma-d8/romstage.c | 3 --- src/mainboard/asus/kfsn4-dre/romstage.c | 3 --- src/mainboard/asus/kgpe-d16/romstage.c | 3 --- src/mainboard/asus/m4a78-em/romstage.c | 14 -------------- src/mainboard/asus/m4a785-m/romstage.c | 14 -------------- src/mainboard/asus/m5a88-v/romstage.c | 17 ----------------- src/mainboard/avalue/eax-785e/romstage.c | 3 --- src/mainboard/gigabyte/ma785gm/romstage.c | 14 -------------- src/mainboard/gigabyte/ma785gmt/romstage.c | 14 -------------- src/mainboard/gigabyte/ma78gm/romstage.c | 14 -------------- src/mainboard/iei/kino-780am2-fam10/romstage.c | 14 -------------- src/mainboard/jetway/pa78vm5/romstage.c | 14 -------------- src/mainboard/msi/ms9652_fam10/romstage.c | 3 --- src/mainboard/supermicro/h8dmr_fam10/romstage.c | 3 --- src/mainboard/supermicro/h8qme_fam10/romstage.c | 4 +--- src/mainboard/supermicro/h8scm_fam10/romstage.c | 16 ---------------- src/mainboard/tyan/s2912_fam10/romstage.c | 3 --- src/northbridge/amd/amdfam10/raminit_amdmct.c | 3 +++ 23 files changed, 4 insertions(+), 181 deletions(-) (limited to 'src') diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c index f9ea822c7f..907c8ed22e 100644 --- a/src/mainboard/advansus/a785e-i/romstage.c +++ b/src/mainboard/advansus/a785e-i/romstage.c @@ -193,10 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index 3d86b60afc..602a433b2d 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -189,10 +189,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index b0d23b2dec..c9fc9ec7ae 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -194,27 +194,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); -// die("Die Before MCT init."); - - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); amdmct_cbmem_store_info(sysinfo); -/* - dump_pci_device_range(PCI_DEV(0, 0x18, 0), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 1), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 2), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); -*/ - -// die("After MCT init before CAR disabled."); - sb7xx_51xx_before_pci_init(); post_code(0x42); diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index 03d3484105..567a60a701 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -300,10 +300,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) memreset_setup(); post_code(0x40); - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index 50c7a002dd..b027e498aa 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -190,10 +190,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c index caff4dfd1c..24117a53d3 100644 --- a/src/mainboard/asus/kcma-d8/romstage.c +++ b/src/mainboard/asus/kcma-d8/romstage.c @@ -550,10 +550,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); #ifdef TEST_MEMORY execute_memory_test(); diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c index 99d437f9be..62a12d1332 100644 --- a/src/mainboard/asus/kfsn4-dre/romstage.c +++ b/src/mainboard/asus/kfsn4-dre/romstage.c @@ -324,10 +324,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c index 59ad0263f7..e9c6e07c26 100644 --- a/src/mainboard/asus/kgpe-d16/romstage.c +++ b/src/mainboard/asus/kgpe-d16/romstage.c @@ -660,10 +660,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); #ifdef TEST_MEMORY execute_memory_test(); diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c index 87a5d77d74..788907a23e 100644 --- a/src/mainboard/asus/m4a78-em/romstage.c +++ b/src/mainboard/asus/m4a78-em/romstage.c @@ -194,27 +194,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); -// die("Die Before MCT init."); - - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); amdmct_cbmem_store_info(sysinfo); -/* - dump_pci_device_range(PCI_DEV(0, 0x18, 0), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 1), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 2), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); -*/ - -// die("After MCT init before CAR disabled."); - sb7xx_51xx_before_pci_init(); post_code(0x42); diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index 02c396f93a..5cc970766c 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -195,27 +195,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); -// die("Die Before MCT init."); - - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); amdmct_cbmem_store_info(sysinfo); -/* - dump_pci_device_range(PCI_DEV(0, 0x18, 0), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 1), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 2), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); -*/ - -// die("After MCT init before CAR disabled."); - sb7xx_51xx_before_pci_init(); post_code(0x42); diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c index 4c2687f0c0..6b03ffdbc6 100644 --- a/src/mainboard/asus/m5a88-v/romstage.c +++ b/src/mainboard/asus/m5a88-v/romstage.c @@ -195,30 +195,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); -// die("Die Before MCT init."); - - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); amdmct_cbmem_store_info(sysinfo); -/* - dump_pci_device_range(PCI_DEV(0, 0x18, 0), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 1), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 2), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); -*/ - -// ram_check(0x00200000, 0x00200000 + (640 * 1024)); -// ram_check(0x40200000, 0x40200000 + (640 * 1024)); - -// die("After MCT init before CAR disabled."); - sb800_before_pci_init(); post_code(0x42); diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c index 88cb7844c3..d4c5ed1f4b 100644 --- a/src/mainboard/avalue/eax-785e/romstage.c +++ b/src/mainboard/avalue/eax-785e/romstage.c @@ -193,10 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c index 2a0a54b276..1bb3c64c77 100644 --- a/src/mainboard/gigabyte/ma785gm/romstage.c +++ b/src/mainboard/gigabyte/ma785gm/romstage.c @@ -190,27 +190,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); -// die("Die Before MCT init."); - - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); amdmct_cbmem_store_info(sysinfo); -/* - dump_pci_device_range(PCI_DEV(0, 0x18, 0), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 1), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 2), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); -*/ - -// die("After MCT init before CAR disabled."); - sb7xx_51xx_before_pci_init(); post_code(0x42); diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c index 67cd4a8bd0..11dd190580 100644 --- a/src/mainboard/gigabyte/ma785gmt/romstage.c +++ b/src/mainboard/gigabyte/ma785gmt/romstage.c @@ -190,27 +190,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); -// die("Die Before MCT init."); - - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); amdmct_cbmem_store_info(sysinfo); -/* - dump_pci_device_range(PCI_DEV(0, 0x18, 0), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 1), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 2), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); -*/ - -// die("After MCT init before CAR disabled."); - sb7xx_51xx_before_pci_init(); post_code(0x42); diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c index 191a391d0f..1f294b6660 100644 --- a/src/mainboard/gigabyte/ma78gm/romstage.c +++ b/src/mainboard/gigabyte/ma78gm/romstage.c @@ -192,27 +192,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); -// die("Die Before MCT init."); - - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); amdmct_cbmem_store_info(sysinfo); -/* - dump_pci_device_range(PCI_DEV(0, 0x18, 0), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 1), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 2), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); -*/ - -// die("After MCT init before CAR disabled."); - sb7xx_51xx_before_pci_init(); post_code(0x42); diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c index 1a89343a13..d42e90b77d 100644 --- a/src/mainboard/iei/kino-780am2-fam10/romstage.c +++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c @@ -192,27 +192,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); -// die("Die Before MCT init."); - - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); amdmct_cbmem_store_info(sysinfo); -/* - dump_pci_device_range(PCI_DEV(0, 0x18, 0), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 1), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 2), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); -*/ - -// die("After MCT init before CAR disabled."); - sb7xx_51xx_before_pci_init(); post_code(0x42); diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index 0b2d1641ed..9c4183e358 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -197,27 +197,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); -// die("Die Before MCT init."); - - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); amdmct_cbmem_store_info(sysinfo); -/* - dump_pci_device_range(PCI_DEV(0, 0x18, 0), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 1), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 2), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); -*/ - -// die("After MCT init before CAR disabled."); - sb7xx_51xx_before_pci_init(); post_code(0x42); diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 8b4350429a..b4988bdb7c 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -237,10 +237,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index 838d7e2f09..1834d5da2b 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -235,10 +235,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index 660610eb33..1c049d1192 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -285,10 +285,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); + cbmem_initialize_empty(); post_code(0x41); diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c index 23d47b4e2f..8508189cc4 100644 --- a/src/mainboard/supermicro/h8scm_fam10/romstage.c +++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c @@ -206,29 +206,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); - - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); amdmct_cbmem_store_info(sysinfo); -/* - dump_pci_device_range(PCI_DEV(0, 0x18, 0), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 1), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 2), 0, 0x200); - dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); -*/ - -// ram_check(0x00200000, 0x00200000 + (640 * 1024)); -// ram_check(0x40200000, 0x40200000 + (640 * 1024)); - -// die("After MCT init before CAR disabled."); - sr5650_before_pci_init(); sb7xx_51xx_before_pci_init(); diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 126724f6a2..93fe493edf 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -233,10 +233,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x40); - timestamp_add_now(TS_BEFORE_INITRAM); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); - timestamp_add_now(TS_AFTER_INITRAM); cbmem_initialize_empty(); post_code(0x41); diff --git a/src/northbridge/amd/amdfam10/raminit_amdmct.c b/src/northbridge/amd/amdfam10/raminit_amdmct.c index 3a2dcccfa2..7a9a6d8e8f 100644 --- a/src/northbridge/amd/amdfam10/raminit_amdmct.c +++ b/src/northbridge/amd/amdfam10/raminit_amdmct.c @@ -26,6 +26,7 @@ #include #include #include +#include /* Global allocation of sysinfo_car */ #include @@ -562,9 +563,11 @@ void raminit_amdmct(struct sys_info *sysinfo) struct DCTStatStruc *pDCTstatA = sysinfo->DCTstatA; printk(BIOS_DEBUG, "raminit_amdmct begin:\n"); + timestamp_add_now(TS_BEFORE_INITRAM); mctAutoInitMCT_D(pMCTstat, pDCTstatA); + timestamp_add_now(TS_AFTER_INITRAM); printk(BIOS_DEBUG, "raminit_amdmct end:\n"); } -- cgit v1.2.3