From 2d072d415b98804a3cbef5d2478050497b3e7a3d Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Sun, 7 Dec 2014 03:03:08 +1100 Subject: northbridge/amd/gx2,lx: Treat MSR constant as unsigned long Clang complains that a signed shift result (0x210000000) requires 35 bits to represent, but 'int' only has 32 bits. However, we write the high bits separately and so this is a spurious warning. Change-Id: I3e1c57334077feb50004d7b39abff4bd84ca095b Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/7673 Reviewed-by: Paul Menzel Reviewed-by: Alexandru Gagniuc Tested-by: build bot (Jenkins) --- src/northbridge/amd/gx2/northbridgeinit.c | 2 +- src/northbridge/amd/lx/northbridgeinit.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c index 136dcf2e02..0cb7803259 100644 --- a/src/northbridge/amd/gx2/northbridgeinit.c +++ b/src/northbridge/amd/gx2/northbridgeinit.c @@ -548,7 +548,7 @@ static void rom_shadow_settings(void) * SYSRC(7:0) = 00h ; writeback, can set to 08h to make writethrough */ #define SYSMEM_RCONF_WRITETHROUGH 8 -#define DEVRC_RCONF_DEFAULT 0x21 +#define DEVRC_RCONF_DEFAULT 0x21ul #define ROMBASE_RCONF_DEFAULT 0xFFFC0000 #define ROMRC_RCONF_DEFAULT 0x25 diff --git a/src/northbridge/amd/lx/northbridgeinit.c b/src/northbridge/amd/lx/northbridgeinit.c index 82b3f48e8e..b4e1d4a080 100644 --- a/src/northbridge/amd/lx/northbridgeinit.c +++ b/src/northbridge/amd/lx/northbridgeinit.c @@ -602,7 +602,7 @@ static void rom_shadow_settings(void) * ***************************************************************************/ #define SYSMEM_RCONF_WRITETHROUGH 8 -#define DEVRC_RCONF_DEFAULT 0x21 +#define DEVRC_RCONF_DEFAULT 0x21ul #define ROMBASE_RCONF_DEFAULT 0xFFFC0000 #define ROMRC_RCONF_DEFAULT 0x25 -- cgit v1.2.3