From 2a81fedd6aecba4c7b1be7b1fea68cde215b5252 Mon Sep 17 00:00:00 2001
From: Gaggery Tsai <gaggery.tsai@intel.com>
Date: Mon, 5 Feb 2018 13:47:39 +0800
Subject: mb/google/poppy/variants/nami: Revise AC/DC loadlines
This patch revises AC/DC loadlines from VRTT reports.
+----------------+-------+-------+-------+-------+
| Domain/Setting | SA | IA | GTUS | GTS |
+----------------+-------+-------+-------+-------+
| AcLoadline | 11 | 2.4 | 3.1 | 3.1 |
| DcLoadline | 10 | 2.46 | 3.1 | 3.1 |
+----------------+-------+-------+-------+-------+
BUG=b:72351128 b:72129954
BRANCH=None
TEST=emerge-nami coreboot chromeos-bootimage & ensure the settings
are passed to FSP.
Change-Id: Ib8aeb82973c42723d7b623967f8085c8f1d926eb
Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
Reviewed-on: https://review.coreboot.org/23635
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
---
.../google/poppy/variants/nami/devicetree.cb | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
(limited to 'src')
diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb
index 55ecb26c11..c4819663cc 100644
--- a/src/mainboard/google/poppy/variants/nami/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb
@@ -78,8 +78,8 @@ chip soc/intel/skylake
#| ImonSlope | 0 | 0 | 0 | 0 |
#| ImonOffset | 0 | 0 | 0 | 0 |
#| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
- #| AcLoadline | 15 | 5.7 | 5.5 | 5.5 |
- #| DcLoadline | 14.3 | 4.83 | 4.2 | 4.2 |
+ #| AcLoadline | 11 | 2.4 | 3.1 | 3.1 |
+ #| DcLoadline | 10 | 2.46 | 3.1 | 3.1 |
#+----------------+-------+-------+-------+-------+
register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
.vr_config_enable = 1,
@@ -91,8 +91,8 @@ chip soc/intel/skylake
.imon_slope = 0x0,
.imon_offset = 0x0,
.voltage_limit = 1520,
- .ac_loadline = 1500,
- .dc_loadline = 1430,
+ .ac_loadline = 1100,
+ .dc_loadline = 1000,
}"
register "domain_vr_config[VR_IA_CORE]" = "{
@@ -105,8 +105,8 @@ chip soc/intel/skylake
.imon_slope = 0x0,
.imon_offset = 0x0,
.voltage_limit = 1520,
- .ac_loadline = 570,
- .dc_loadline = 483,
+ .ac_loadline = 240,
+ .dc_loadline = 246,
}"
register "domain_vr_config[VR_GT_UNSLICED]" = "{
@@ -119,8 +119,8 @@ chip soc/intel/skylake
.imon_slope = 0x0,
.imon_offset = 0x0,
.voltage_limit = 1520,
- .ac_loadline = 550,
- .dc_loadline = 420,
+ .ac_loadline = 310,
+ .dc_loadline = 310,
}"
register "domain_vr_config[VR_GT_SLICED]" = "{
@@ -133,8 +133,8 @@ chip soc/intel/skylake
.imon_slope = 0x0,
.imon_offset = 0x0,
.voltage_limit = 1520,
- .ac_loadline = 550,
- .dc_loadline = 420,
+ .ac_loadline = 310,
+ .dc_loadline = 310,
}"
# Root port 4 (x1)
--
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