From 244ecad52cd9ab4d0c6f1786a34a97b687ef53d0 Mon Sep 17 00:00:00 2001 From: "eddylu@ami.corp-partner.google.com" Date: Tue, 14 Jun 2022 13:03:34 +0800 Subject: mb/google/brya/vell: Implement variant_devtree_update() for audio Different board versions have different audio layouts, therefore support both layouts by enabling only the appropriate devices in the devicetree via board_id(). BUG=b:207333035 BRANCH=none TEST='FW_NAME=vell emerge-brya coreboot' Change-Id: If053b8f85933f8fc75589ae175e225cc9c1e3991 Signed-off-by: Eddy Lu Reviewed-on: https://review.coreboot.org/c/coreboot/+/65124 Reviewed-by: Shon Wang Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- .../google/brya/variants/vell/overridetree.cb | 32 ++++++++++++++++++++-- src/mainboard/google/brya/variants/vell/variant.c | 25 +++++++++++++++++ 2 files changed, 55 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index f40b52beec..903b67f209 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -225,6 +225,34 @@ chip soc/intel/alderlake end end device ref i2c0 on + chip drivers/i2c/cs35l53 + register "name" = ""SPK0"" + register "sub" = ""103CA221"" + register "desc" = ""Cirrus Logic CS35L53 Tweeter Left Audio Codec"" + register "uid" = "2" + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_D14)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)" + register "boost_type" = "EXTERNAL_BOOST" + register "asp_sdout_hiz" = "ASP_SDOUT_LOGIC0_UNUSED_LOGIC0_DISABLED" + register "gpio1_output_enable" = "true" + register "gpio1_src_select" = "GPIO1_SRC_GPIO" + register "gpio2_src_select" = "GPIO2_SRC_HIGH_IMPEDANCE" + device i2c 0x40 alias i2c0_cs35l53_0 on end + end + chip drivers/i2c/cs35l53 + register "name" = ""SPK1"" + register "sub" = ""103CA221"" + register "desc" = ""Cirrus Logic CS35L53 Woofer Left Audio Codec"" + register "uid" = "0" + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_D14)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)" + register "boost_type" = "EXTERNAL_BOOST" + register "asp_sdout_hiz" = "ASP_SDOUT_LOGIC0_UNUSED_LOGIC0_DISABLED" + register "gpio1_output_enable" = "true" + register "gpio1_src_select" = "GPIO1_SRC_GPIO" + register "gpio2_src_select" = "GPIO2_SRC_HIGH_IMPEDANCE" + device i2c 0x41 alias i2c0_cs35l53_1 on end + end chip drivers/i2c/cs35l53 register "name" = ""SPK2"" register "sub" = ""103CA221"" @@ -363,7 +391,7 @@ chip soc/intel/alderlake register "gpio1_output_enable" = "true" register "gpio1_src_select" = "GPIO1_SRC_GPIO" register "gpio2_src_select" = "GPIO2_SRC_HIGH_IMPEDANCE" - device i2c 0x40 on end + device i2c 0x40 alias i2c7_cs35l53_0 on end end chip drivers/i2c/cs35l53 register "name" = ""SPK1"" @@ -377,7 +405,7 @@ chip soc/intel/alderlake register "gpio1_output_enable" = "true" register "gpio1_src_select" = "GPIO1_SRC_GPIO" register "gpio2_src_select" = "GPIO2_SRC_HIGH_IMPEDANCE" - device i2c 0x41 on end + device i2c 0x41 alias i2c7_cs35l53_1 on end end end device ref gspi1 on diff --git a/src/mainboard/google/brya/variants/vell/variant.c b/src/mainboard/google/brya/variants/vell/variant.c index 76f0f524a8..216de3c90d 100644 --- a/src/mainboard/google/brya/variants/vell/variant.c +++ b/src/mainboard/google/brya/variants/vell/variant.c @@ -1,8 +1,33 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +#include +#include #include +#include const char *get_wifi_sar_cbfs_filename(void) { return "wifi_sar_0.hex"; } + +void variant_devtree_update(void) +{ + struct device *i2c0_cs35l53_0 = DEV_PTR(i2c0_cs35l53_0); + struct device *i2c0_cs35l53_1 = DEV_PTR(i2c0_cs35l53_1); + struct device *i2c7_cs35l53_0 = DEV_PTR(i2c7_cs35l53_0); + struct device *i2c7_cs35l53_1 = DEV_PTR(i2c7_cs35l53_1); + + uint32_t board_ver = board_id(); + + if (board_ver >= 2) { + i2c0_cs35l53_0->enabled = 0; + i2c0_cs35l53_1->enabled = 0; + i2c7_cs35l53_0->enabled = 1; + i2c7_cs35l53_1->enabled = 1; + } else { + i2c0_cs35l53_0->enabled = 1; + i2c0_cs35l53_1->enabled = 1; + i2c7_cs35l53_0->enabled = 0; + i2c7_cs35l53_1->enabled = 0; + } +} -- cgit v1.2.3