From 23e15b1223b3a608f04851c62bd1a87e0cc9e68d Mon Sep 17 00:00:00 2001 From: Ian Feng Date: Fri, 7 May 2021 14:24:54 +0800 Subject: mb/google/octopus/var/fleex: Add cs42l42 HSBIAS setting Disable HSBIAS sense setting. BUG=b:184103445 TEST=boot to check cs42l42 is functional. Signed-off-by: Ian Feng Change-Id: I12c0e0a0f7490d35d36fe8ccbc940f29e1bb7976 Reviewed-on: https://review.coreboot.org/c/coreboot/+/53901 Tested-by: build bot (Jenkins) Reviewed-by: Vitaly Rodionov Reviewed-by: Furquan Shaikh --- src/mainboard/google/octopus/variants/fleex/overridetree.cb | 1 + 1 file changed, 1 insertion(+) (limited to 'src') diff --git a/src/mainboard/google/octopus/variants/fleex/overridetree.cb b/src/mainboard/google/octopus/variants/fleex/overridetree.cb index f0343cd69b..5007719002 100644 --- a/src/mainboard/google/octopus/variants/fleex/overridetree.cb +++ b/src/mainboard/google/octopus/variants/fleex/overridetree.cb @@ -148,6 +148,7 @@ chip soc/intel/apollolake register "bias_lvls[2]" = "4" register "bias_lvls[3]" = "1" register "hs_bias_ramp_rate" = "HSBIAS_RAMP_SLOW" + register "hs_bias_sense_disable" = "true" device i2c 48 on end end end # - I2C 5 -- cgit v1.2.3