From 23012a0dff9810c9055369fb5f21e8ef5f074f7b Mon Sep 17 00:00:00 2001 From: Aamir Bohra Date: Tue, 9 Oct 2018 20:33:16 +0530 Subject: soc/intel/icelake: Allow coreboot to reserve stack for fsp Change-Id: I5f2d9548b8e2c7b1d154b7bad126ec7b1052231a Signed-off-by: Subrata Banik Signed-off-by: Aamir Bohra Reviewed-on: https://review.coreboot.org/29317 Tested-by: build bot (Jenkins) Reviewed-by: Shelley Chen --- src/soc/intel/icelake/Kconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src') diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 664add2c8c..c4ee841802 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -19,6 +19,7 @@ config CPU_SPECIFIC_OPTIONS select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select FSP_USES_CB_STACK select GENERIC_GPIO_LIB select HAVE_FSP_GOP select INTEL_DESCRIPTOR_MODE_CAPABLE @@ -89,6 +90,7 @@ config DCACHE_RAM_SIZE config DCACHE_BSP_STACK_SIZE hex + default 0x20000 if FSP_USES_CB_STACK default 0x4000 help The amount of anticipated stack usage in CAR by bootblock and -- cgit v1.2.3