From 22d94ba8a2178b587660f75b221ec06dec776c34 Mon Sep 17 00:00:00 2001 From: Yidi Lin Date: Mon, 28 Dec 2015 16:14:42 +0800 Subject: google/oak: Configure SPI_LEVEL_ENABLE pin for rev5 Oak introduces a 1.8V to 3.3V level shifter for EC SPI bus after rev5. BRANCH=none BUG=none TEST=emerge-oak coreboot Change-Id: I71868b003fc71dee0532033299afc155a9fbec9c Signed-off-by: Patrick Georgi Original-Commit-Id: 030b478fedf046a7b818696779299c591415fcbd Original-Change-Id: Ibff9705832700867279cb1b39b752b8f5f27cf33 Original-Signed-off-by: Yidi Lin Original-Reviewed-on: https://chromium-review.googlesource.com/320026 Original-Reviewed-by: Julius Werner Reviewed-on: https://review.coreboot.org/13970 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/google/oak/bootblock.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src') diff --git a/src/mainboard/google/oak/bootblock.c b/src/mainboard/google/oak/bootblock.c index 49cf5ddf65..2c13b14720 100644 --- a/src/mainboard/google/oak/bootblock.c +++ b/src/mainboard/google/oak/bootblock.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -79,6 +80,10 @@ void bootblock_mainboard_init(void) /* set nor related GPIO */ nor_set_gpio_pinmux(); + /* SPI_LEVEL_ENABLE: Enable 1.8V to 3.3V level shifter for EC SPI bus */ + if (board_id() > 4) + gpio_output(PAD_SRCLKENAI2, 1); + /* Init i2c bus 2 Timing register for TPM */ mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS); -- cgit v1.2.3