From 22aeed307de770ac4d6cc0cb151a935a8840b10c Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 11 Jun 2020 13:28:03 +0200 Subject: nb/intel/i945/rcven.c: Correct comment The offset between registers has to be between different channels. Change-Id: Ic6d959c31c78073a3ecbf7a17dfb73ac36340599 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/42284 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: HAOUAS Elyes --- src/northbridge/intel/i945/rcven.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/northbridge/intel/i945/rcven.c b/src/northbridge/intel/i945/rcven.c index ea37d9c4f3..0b5890410f 100644 --- a/src/northbridge/intel/i945/rcven.c +++ b/src/northbridge/intel/i945/rcven.c @@ -253,7 +253,7 @@ static int find_strobes_edge(int channel_offset, u8 *mediumcoarse, u8 *fine, } /** - * Here we use a trick. The RCVEN channel 0 registers are all at an + * Here we use a trick. The RCVEN channel 1 registers are all at an * offset of 0x80 to the channel 0 registers. We don't want to waste * a lot of if ()s so let's just pass 0 or 0x80 for the channel offset. */ -- cgit v1.2.3