From 1fd5a9b36d8b817614ef7f0c301291da0cdb7466 Mon Sep 17 00:00:00 2001 From: David Hendricks Date: Sat, 27 Sep 2014 20:10:41 -0700 Subject: pinky: Force delay for EC SPI transfers This gives the EC some time to wake-up between asserting /CS and starting a transfer. BUG=chrome-os-partner:32223 BRANCH=none TEST=verified ~100us delay using logic analyzer on Pinky Original-Change-Id: I9874e65abd405874c43c594d8caeeff9e1300455 Original-Signed-off-by: David Hendricks Original-Reviewed-on: https://chromium-review.googlesource.com/220243 Original-Reviewed-by: Julius Werner Original-Reviewed-by: Alexandru Stan Original-Commit-Queue: Alexandru Stan Original-Tested-by: Alexandru Stan Change-Id: I103542517d3ebd7da4f0394b3ae4f68f58403b1e (cherry picked from commit bdb67fe489b7cbea7a26492fa0536ca452434052) Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/9238 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/google/veyron_pinky/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src') diff --git a/src/mainboard/google/veyron_pinky/Kconfig b/src/mainboard/google/veyron_pinky/Kconfig index 07b31fff16..7f981b428b 100644 --- a/src/mainboard/google/veyron_pinky/Kconfig +++ b/src/mainboard/google/veyron_pinky/Kconfig @@ -49,6 +49,10 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS hex default 0 +config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US + int + default 100 + config VBOOT_RAMSTAGE_INDEX hex default 0x3 -- cgit v1.2.3