From 1fc92dee521e2a8169158b7a7a01d954415854a9 Mon Sep 17 00:00:00 2001
From: Hung-Te Lin <hungte@chromium.org>
Date: Fri, 3 Sep 2021 15:41:02 +0800
Subject: mb/google/asurada: enable MIPI_DSI_MODE_LINE_END to fix display
issues
The ANX7625 needs explicit LINE_END to output proper
display data.
This patch is based on CB:51435 (commit b923931,
"mb/google/kukui: Add flag for MIPI_DSI_MODE_LINE_END ANX7625")
BUG=b:198558237
TEST=emerge-asurada coreboot
BRANCH=asurada
Change-Id: Id5666fa1bcf96002725509d7436ea1ff5febef93
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57486
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
src/mainboard/google/asurada/mainboard.c | 1 +
1 file changed, 1 insertion(+)
(limited to 'src')
diff --git a/src/mainboard/google/asurada/mainboard.c b/src/mainboard/google/asurada/mainboard.c
index 99c6cf3741..c8faffcfcd 100644
--- a/src/mainboard/google/asurada/mainboard.c
+++ b/src/mainboard/google/asurada/mainboard.c
@@ -118,6 +118,7 @@ static bool configure_display(void)
u32 mipi_dsi_flags = (MIPI_DSI_MODE_VIDEO |
MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM |
+ MIPI_DSI_MODE_LINE_END |
MIPI_DSI_MODE_EOT_PACKET);
if (mtk_dsi_init(mipi_dsi_flags, MIPI_DSI_FMT_RGB888, 4, &edid, NULL) < 0) {
--
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