From 1cb930b5d181b1e15275e45de887e05f096dbc85 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 12 Jan 2023 15:52:55 +0100 Subject: mb/lenovo/t520: Disable SATA2 and Thermal on W520 If a discoverable device (e.g. a PCI device) does not appear in the devicetree (typically because it is removable), coreboot enables it by default. Disable the SATA2 (device for SATA ports 4 and 5, which is not used in AHCI mode) and Thermal devices on W520 as well. Both devices were only disabled on the T520. Tested, this change fixes a long boot time when using MrChromebox's edk2 payload on the W520, likely related to the following errors: AHCI: Error interrupt reported PxIS: 40000001 Non data transfer failed at retry 0 AHCI: Error interrupt reported PxIS: 40000001 Non data transfer failed at retry 1 AHCI: Error interrupt reported PxIS: 40000001 Non data transfer failed at retry 2 AHCI: Error interrupt reported PxIS: 40000001 Non data transfer failed at retry 3 AHCI: Error interrupt reported PxIS: 40000001 Non data transfer failed at retry 4 Change-Id: I0b0483aae05fa84d97987a93db634b740f830e18 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/71857 Reviewed-by: Paul Menzel Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/mainboard/lenovo/t520/devicetree.cb | 2 ++ src/mainboard/lenovo/t520/variants/t520/overridetree.cb | 2 -- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index 5048c698d7..55c8d981fd 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -145,6 +145,8 @@ chip northbridge/intel/sandybridge device i2c 5f on end end end # SMBus + device pci 1f.5 off end # IDE controller + device pci 1f.6 off end # Thermal controller end end end diff --git a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb index 407e02d907..b976d6d904 100644 --- a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb +++ b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb @@ -9,8 +9,6 @@ chip northbridge/intel/sandybridge register "wwan_gpio_lvl" = "0" end end # LPC bridge - device pci 1f.5 off end # IDE controller - device pci 1f.6 off end # Thermal controller end end end -- cgit v1.2.3