From 1b39cb1ba0ac0f151f7d0bcf19f2a48ee8f65c50 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Tue, 8 Aug 2023 01:41:55 +0200 Subject: soc/amd/cezanne/include/data_fabric: add DF PCI config map register PPR #56569 Rev 3.04 was used as a reference. Signed-off-by: Felix Held Change-Id: Idfac7d996c6de9ea7c6adf2760de0ad97ffb9ec0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/77076 Tested-by: build bot (Jenkins) Reviewed-by: Martin L Roth Reviewed-by: Eric Lai --- src/soc/amd/cezanne/include/soc/data_fabric.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'src') diff --git a/src/soc/amd/cezanne/include/soc/data_fabric.h b/src/soc/amd/cezanne/include/soc/data_fabric.h index 7787e19728..7f18b36720 100644 --- a/src/soc/amd/cezanne/include/soc/data_fabric.h +++ b/src/soc/amd/cezanne/include/soc/data_fabric.h @@ -8,6 +8,25 @@ #define IOMS0_FABRIC_ID 10 +#define DF_PCI_CFG_MAP0 DF_REG_ID(0, 0xa0) + +#define DF_PCI_CFG_MAP_COUNT 8 + +#define DF_PCI_CFG_MAP(reg) (DF_PCI_CFG_MAP0 + (reg) * sizeof(uint32_t)) + +union df_pci_cfg_map { + struct { + uint32_t re : 1; /* [ 0.. 0] */ + uint32_t we : 1; /* [ 1.. 1] */ + uint32_t : 2; /* [ 2.. 3] */ + uint32_t dst_fabric_id : 10; /* [ 4..13] */ + uint32_t : 2; /* [14..15] */ + uint32_t bus_num_base : 8; /* [16..23] */ + uint32_t bus_num_limit : 8; /* [24..31] */ + }; + uint32_t raw; +}; + #define DF_IO_BASE0 DF_REG_ID(0, 0xc0) #define DF_IO_LIMIT0 DF_REG_ID(0, 0xc4) -- cgit v1.2.3