From 17277ff6580e054eb7ac33f46c3c58c4bee9e886 Mon Sep 17 00:00:00 2001 From: John Zhao Date: Tue, 31 Mar 2020 21:55:35 -0700 Subject: soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope type TCSS TBT PCIE root ports scope type was mistakenly set to PCI_ENDPOINT. Fix the scope type to be PCI_SUB. BUG=b:141609884 TEST=Booted to kernel and verified no TBT PCIE root ports scope type mismatch error in kernel log. Change-Id: I844e7e9583992be496223fb51f24c5aa24fc7d21 Signed-off-by: John Zhao Reviewed-on: https://review.coreboot.org/c/coreboot/+/40004 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Tim Wawrzynczak --- src/soc/intel/tigerlake/acpi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c index 9e7ff56752..36c488b575 100644 --- a/src/soc/intel/tigerlake/acpi.c +++ b/src/soc/intel/tigerlake/acpi.c @@ -235,7 +235,7 @@ static unsigned long soc_fill_dmar(unsigned long current) unsigned long tmp = current; current += acpi_create_dmar_drhd(current, 0, 0, tbtbar); - current += acpi_create_dmar_ds_pci(current, 0, 7, i); + current += acpi_create_dmar_ds_pci_br(current, 0, 7, i); acpi_dmar_drhd_fixup(tmp, current); } -- cgit v1.2.3