From 14ef26b07b2f2d0150005e85de45af672e2b492d Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Mon, 30 Oct 2017 16:02:17 -0600 Subject: amd/stoneyridge: Consolidate duplicate comment Change-Id: Ifaf8815dff595eb723f1b864b8f827768cb43847 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/22243 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/amd/stoneyridge/include/soc/southbridge.h | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'src') diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 78a4038a16..8630ea92a7 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -30,14 +30,10 @@ #endif #define HPET_BASE_ADDRESS 0xfed00000 -/* Offsets from ACPI_MMIO_BASE */ +/* Register blocks at fixed offsets from FED8_0000h and enabled in PMx04[1] */ + #define APU_SMI_BASE 0xfed80200 -/* - * Offsets from ACPI_MMIO_BASE - * This is defined by AGESA, but we don't include AGESA headers to avoid - * polluting the namespace. - */ #define PM_MMIO_BASE 0xfed80300 #define APU_UART0_BASE 0xfedc6000 -- cgit v1.2.3