From 1346a27dee50e200b6e36bf378aa8ed10457b8f2 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Thu, 10 May 2007 18:49:58 +0000 Subject: This patch removes auto.c from the Norwich mainboard directory. Acked-by: Stefan Reinauer Signed-off-by: Marc Jones git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2652 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/amd/norwich/auto.c | 106 --------------------------------------- 1 file changed, 106 deletions(-) delete mode 100644 src/mainboard/amd/norwich/auto.c (limited to 'src') diff --git a/src/mainboard/amd/norwich/auto.c b/src/mainboard/amd/norwich/auto.c deleted file mode 100644 index 127b4d8079..0000000000 --- a/src/mainboard/amd/norwich/auto.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * This file is part of the LinuxBIOS project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define ASSEMBLY 1 - -#include -#include -#include -#include -#include -#include -#include "pc80/serial.c" -#include "arch/i386/lib/console.c" -#include "ram/ramtest.c" -#include "cpu/x86/bist.h" -#include "cpu/x86/msr.h" -#include -#include -#include "southbridge/amd/cs5536/cs5536.h" - -#define POST_CODE(x) outb(x, 0x80) - -#include "southbridge/amd/cs5536/cs5536_early_smbus.c" -#include "southbridge/amd/cs5536/cs5536_early_setup.c" - -static inline int spd_read_byte(unsigned device, unsigned address) -{ - return smbus_read_byte(device, address); -} - -#define ManualConf 0 /* Do automatic strapped PLL config */ -#define PLLMSRhi 0x00001490 /* manual settings for the PLL */ -#define PLLMSRlo 0x02000030 -#define DIMM0 0xA0 -#define DIMM1 0xA2 -#include "northbridge/amd/lx/raminit.h" -#include "northbridge/amd/lx/pll_reset.c" -#include "northbridge/amd/lx/raminit.c" -#include "sdram/generic_sdram.c" -#include "cpu/amd/model_lx/cpureginit.c" -#include "cpu/amd/model_lx/syspreinit.c" - -static void msr_init(void) -{ - /* Setup access to the MC for low memory. Note MC not setup yet. */ - __builtin_wrmsr(CPU_RCONF_DEFAULT, 0x10f3bf00, 0x24fffc02); - - __builtin_wrmsr(MSR_GLIU0 + 0x20, 0xfff80, 0x20000000); - __builtin_wrmsr(MSR_GLIU0 + 0x21, 0x80fffe0, 0x20000000); - - __builtin_wrmsr(MSR_GLIU1 + 0x20, 0xfff80, 0x20000000); - __builtin_wrmsr(MSR_GLIU1 + 0x21, 0x80fffe0, 0x20000000); -} - -static void mb_gpio_init(void) -{ - /* Early mainboard specific GPIO setup */ -} - -static void main(unsigned long bist) -{ - static const struct mem_controller memctrl[] = { - {.channel0 = {(0xa << 3) | 0, (0xa << 3) | 1}} - }; - - SystemPreInit(); - msr_init(); - - cs5536_early_setup(); - - /* NOTE: must do this AFTER the early_setup! - * it is counting on some early MSR setup - * for cs5536 - */ - /* cs5536_disable_internal_uart disable them for now, set them up later... */ - cs5536_setup_onchipuart(); /* if debug. real setup done in chipset init via config.lb */ - mb_gpio_init(); - uart_init(); - console_init(); - - pll_reset(ManualConf); - - cpuRegInit(); - - sdram_initialize(1, memctrl); - - /* Check all of memory */ - //ram_check(0x00000000, 640*1024); -} -- cgit v1.2.3