From 0c253b69af0f020703634d56b7140056f6400ec3 Mon Sep 17 00:00:00 2001 From: huang lin Date: Thu, 29 Jan 2015 19:50:59 +0800 Subject: rk3288: move reboot_from_watchdog() before rk808 setting we will use dvs to adjust the voltage in kernel, if device reset by watchdog in kernel, the dvs gpio may not reset, and we use the i2c to adjust rk808 voltage in coreboot, so it may failure. so we move the reboot_from_watchdog() before the rk808 setting. BUG=None TEST=Boot from speedy BRANCH=None Change-Id: I809c63153d49680d9c84462aafd7bae09106fa6e Signed-off-by: Patrick Georgi Original-Commit-Id: 76efb4b0196eecc84664a4c5dce2221152a39c0a Original-Change-Id: I92b5c6413bbffe30566178de89df1f9683790982 Original-Signed-off-by: huang lin Original-Reviewed-on: https://chromium-review.googlesource.com/244289 Original-Reviewed-by: Julius Werner Original-Commit-Queue: Julius Werner Original-Tested-by: Julius Werner Reviewed-on: http://review.coreboot.org/9752 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/google/veyron_jerry/bootblock.c | 6 +++--- src/mainboard/google/veyron_mighty/bootblock.c | 6 +++--- src/mainboard/google/veyron_pinky/bootblock.c | 6 +++--- src/mainboard/google/veyron_speedy/bootblock.c | 6 +++--- 4 files changed, 12 insertions(+), 12 deletions(-) (limited to 'src') diff --git a/src/mainboard/google/veyron_jerry/bootblock.c b/src/mainboard/google/veyron_jerry/bootblock.c index acf81bc0cb..2f012ec80e 100644 --- a/src/mainboard/google/veyron_jerry/bootblock.c +++ b/src/mainboard/google/veyron_jerry/bootblock.c @@ -45,6 +45,9 @@ void bootblock_mainboard_early_init() void bootblock_mainboard_init(void) { + if (rkclk_was_watchdog_reset()) + reboot_from_watchdog(); + /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */ setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA); @@ -58,9 +61,6 @@ void bootblock_mainboard_init(void) udelay(100);/* Must wait for voltage to stabilize,2mV/us */ rkclk_configure_cpu(); - if (rkclk_was_watchdog_reset()) - reboot_from_watchdog(); - /* i2c1 for tpm */ writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1); i2c_init(1, 400*KHz); diff --git a/src/mainboard/google/veyron_mighty/bootblock.c b/src/mainboard/google/veyron_mighty/bootblock.c index acf81bc0cb..2f012ec80e 100644 --- a/src/mainboard/google/veyron_mighty/bootblock.c +++ b/src/mainboard/google/veyron_mighty/bootblock.c @@ -45,6 +45,9 @@ void bootblock_mainboard_early_init() void bootblock_mainboard_init(void) { + if (rkclk_was_watchdog_reset()) + reboot_from_watchdog(); + /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */ setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA); @@ -58,9 +61,6 @@ void bootblock_mainboard_init(void) udelay(100);/* Must wait for voltage to stabilize,2mV/us */ rkclk_configure_cpu(); - if (rkclk_was_watchdog_reset()) - reboot_from_watchdog(); - /* i2c1 for tpm */ writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1); i2c_init(1, 400*KHz); diff --git a/src/mainboard/google/veyron_pinky/bootblock.c b/src/mainboard/google/veyron_pinky/bootblock.c index acf81bc0cb..2f012ec80e 100644 --- a/src/mainboard/google/veyron_pinky/bootblock.c +++ b/src/mainboard/google/veyron_pinky/bootblock.c @@ -45,6 +45,9 @@ void bootblock_mainboard_early_init() void bootblock_mainboard_init(void) { + if (rkclk_was_watchdog_reset()) + reboot_from_watchdog(); + /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */ setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA); @@ -58,9 +61,6 @@ void bootblock_mainboard_init(void) udelay(100);/* Must wait for voltage to stabilize,2mV/us */ rkclk_configure_cpu(); - if (rkclk_was_watchdog_reset()) - reboot_from_watchdog(); - /* i2c1 for tpm */ writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1); i2c_init(1, 400*KHz); diff --git a/src/mainboard/google/veyron_speedy/bootblock.c b/src/mainboard/google/veyron_speedy/bootblock.c index acf81bc0cb..2f012ec80e 100644 --- a/src/mainboard/google/veyron_speedy/bootblock.c +++ b/src/mainboard/google/veyron_speedy/bootblock.c @@ -45,6 +45,9 @@ void bootblock_mainboard_early_init() void bootblock_mainboard_init(void) { + if (rkclk_was_watchdog_reset()) + reboot_from_watchdog(); + /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */ setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA); @@ -58,9 +61,6 @@ void bootblock_mainboard_init(void) udelay(100);/* Must wait for voltage to stabilize,2mV/us */ rkclk_configure_cpu(); - if (rkclk_was_watchdog_reset()) - reboot_from_watchdog(); - /* i2c1 for tpm */ writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1); i2c_init(1, 400*KHz); -- cgit v1.2.3