From 0bd22ce82c6e4beaacfe591a6ae8ce2874d042b7 Mon Sep 17 00:00:00 2001 From: Sourabh Banerjee Date: Fri, 24 Apr 2015 22:54:18 +0530 Subject: ipq806x: clear the RPM initialization Acknowledge bit The RPM initialization Acknowledge is cleared by writing 1 into bit-10 of the RPM_INT_ACK register. The existing code got it wrong and is writing zero to that bit. BRANCH=storm BUG=chrome-os-partner:39231 TEST=with this patch and an RPM firmware update, an SP4 device survived more than 1000 reboots in a row. Change-Id: Ibba296ed0571ad9403a0c51c7f82f07f185b4e83 Signed-off-by: Patrick Georgi Original-Commit-Id: 13b4a0f093ba652ad6bccdfc4b3686c0741c6fe7 Original-Change-Id: I39e6ea50e0f66b4af68bdb868dd4437c34bb4524 Original-Signed-off-by: Viswanath Kraleti Original-Signed-off-by: Vadim Bendebury Original-Reviewed-on: https://chromium-review.googlesource.com/266969 Original-Reviewed-by: Manoj Juneja Reviewed-on: http://review.coreboot.org/10310 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Stefan Reinauer --- src/soc/qualcomm/ipq806x/blobs_init.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/soc/qualcomm/ipq806x/blobs_init.c b/src/soc/qualcomm/ipq806x/blobs_init.c index dc522003ba..ae7e4d4b48 100644 --- a/src/soc/qualcomm/ipq806x/blobs_init.c +++ b/src/soc/qualcomm/ipq806x/blobs_init.c @@ -131,7 +131,11 @@ void start_rpm(void) printk(BIOS_INFO, "Starting RPM\n"); /* Clear 'ready' indication. */ - write32(RPM_INT_ACK, read32(RPM_INT_ACK) & ~ready_mask); + /* + * RPM_INT_ACK is clear-on-write type register, + * read-modify-write is not recommended. + */ + write32(RPM_INT_ACK, ready_mask); /* Set RPM entry address */ write32(RPM_SIGNAL_ENTRY, load_addr); -- cgit v1.2.3