From 0ba0ce6b79421194bfbca79cc7b32e33c4e018ad Mon Sep 17 00:00:00 2001 From: Greg Watson Date: Thu, 3 Jun 2004 16:51:18 +0000 Subject: briQ timer support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1594 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/totalimpact/briq/clock.c | 42 ++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 src/mainboard/totalimpact/briq/clock.c (limited to 'src') diff --git a/src/mainboard/totalimpact/briq/clock.c b/src/mainboard/totalimpact/briq/clock.c new file mode 100644 index 0000000000..76827653a6 --- /dev/null +++ b/src/mainboard/totalimpact/briq/clock.c @@ -0,0 +1,42 @@ +#include +#include "../../../northbridge/ibm/cpc710/cpc710.h" + +/* + * Bus clock jumper settings on SIOR0 27:28 + */ +static uint32_t BusClockSpeed[] = { + 66000000, /* 00 */ + 83000000, /* 01 */ + 100000000, /* 10 */ + 133000000 /* 11 */ +}; + +/* + * Timer frequency is 1/4 of the bus clock frequency. + * + * For the briQ, bits 27:28 of SIOR0 encode bus clock frequency. + */ +unsigned long +get_timer_freq(void) +{ + uint32_t sior0 = getCPC710(CPC710_SDRAM0_SIOR0); + + return BusClockSpeed[(sior0 >> 3) & 0x2] / 4; +} + +/* + * Frequency of PCI bus. + * + * For the briQ, bit 29 of SIOR0 is 66MHz enable (active low). + */ +unsigned long +get_pci_bus_freq(void) +{ + uint32_t sior0 = getCPC710(CPC710_SDRAM0_SIOR0); + + if (sior0 & 0x4 == 0x4) + return 33000000; + + return 66000000; +} + -- cgit v1.2.3