From 089b88c165468367e176d5bcc022b3702f499234 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 18 Jan 2014 12:26:13 +0200 Subject: usbdebug: Remove duplicate port claim MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This claim is useless when done before EHCI controller reset. Code in usbdebug_init_() already sets this properly after reset, see use of DBGP_OWNER. Change-Id: Ic17493fe4edbbbed6ebcbef35a264fbf188f1fba Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/4709 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/southbridge/intel/common/usb_debug.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'src') diff --git a/src/southbridge/intel/common/usb_debug.c b/src/southbridge/intel/common/usb_debug.c index fecd716fdd..d18cb0fe12 100644 --- a/src/southbridge/intel/common/usb_debug.c +++ b/src/southbridge/intel/common/usb_debug.c @@ -64,8 +64,6 @@ void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port) void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base) { - u32 dbgctl; - /* Bail out. No console to complain in. */ if (!dev) return; @@ -75,9 +73,4 @@ void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base) /* Enable access to the EHCI memory space registers. */ pci_write_config8(dev, PCI_COMMAND, PCI_COMMAND_MEMORY); - - /* Force ownership of the Debug Port to the EHCI controller. */ - dbgctl = read32(base + CONFIG_EHCI_DEBUG_OFFSET); - dbgctl |= (1 << 30); - write32(base + CONFIG_EHCI_DEBUG_OFFSET, dbgctl); } -- cgit v1.2.3