From 075ad63a4fd344ed213f24aad0d810a9bd1f48e3 Mon Sep 17 00:00:00 2001 From: Huayang Duan Date: Fri, 3 Jul 2020 10:18:58 +0800 Subject: mb/google/asurada: Init dram in romstage Signed-off-by: Huayang Duan Signed-off-by: Yidi Lin Change-Id: Ied350570a695cca1424a6562e41120bcaf467797 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44568 Reviewed-by: Yu-Ping Wu Reviewed-by: Hung-Te Lin Tested-by: build bot (Jenkins) --- src/mainboard/google/asurada/Makefile.inc | 1 + src/mainboard/google/asurada/romstage.c | 48 +++++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+) create mode 100644 src/mainboard/google/asurada/romstage.c (limited to 'src') diff --git a/src/mainboard/google/asurada/Makefile.inc b/src/mainboard/google/asurada/Makefile.inc index 8395e4a35b..c74253994c 100644 --- a/src/mainboard/google/asurada/Makefile.inc +++ b/src/mainboard/google/asurada/Makefile.inc @@ -8,6 +8,7 @@ verstage-y += reset.c romstage-y += memlayout.ld romstage-y += boardid.c +romstage-y += romstage.c romstage-y += sdram_configs.c ramstage-y += memlayout.ld diff --git a/src/mainboard/google/asurada/romstage.c b/src/mainboard/google/asurada/romstage.c new file mode 100644 index 0000000000..a0e0818e01 --- /dev/null +++ b/src/mainboard/google/asurada/romstage.c @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include + +/* This must be defined in chromeos.fmd in same name and size. */ +#define CALIBRATION_REGION "RW_DDR_TRAINING" +#define CALIBRATION_REGION_SIZE 0x2000 + +_Static_assert(sizeof(struct dramc_param) <= CALIBRATION_REGION_SIZE, + "sizeof(struct dramc_param) exceeds " CALIBRATION_REGION); + +static bool read_calibration_data_from_flash(struct dramc_param *dparam) +{ + const size_t length = sizeof(*dparam); + size_t ret = fmap_read_area(CALIBRATION_REGION, dparam, length); + printk(BIOS_DEBUG, "read data from flash, ret=%#zx, length=%#zx\n", ret, length); + + return ret == length; +} + +static bool write_calibration_data_to_flash(const struct dramc_param *dparam) +{ + const size_t length = sizeof(*dparam); + size_t ret = fmap_overwrite_area(CALIBRATION_REGION, dparam, length); + printk(BIOS_DEBUG, "write data from flash, ret=%#zx, length=%#zx\n", ret, length); + + return ret == length; +} + +/* dramc_param is ~2K and too large to fit in stack. */ +static struct dramc_param dramc_parameter; + +static struct dramc_param_ops dparam_ops = { + .param = &dramc_parameter, + .read_from_flash = &read_calibration_data_from_flash, + .write_to_flash = &write_calibration_data_to_flash, +}; + +void platform_romstage_main(void) +{ + mt_mem_init(&dparam_ops); + mtk_mmu_after_dram(); +} -- cgit v1.2.3