From 033bb4bc8d620288ed82fe982a32f567060499b6 Mon Sep 17 00:00:00 2001 From: Timothy Pearson Date: Tue, 10 Feb 2015 22:21:39 -0600 Subject: acpi: Generate valid ACPI processor objects The existing code generated invalid ACPI processor objects if the core number was greater than 9. The first invalid object instance was autocorrected by Linux, but subsequent instances conflicted with each other, leading to a failure to boot if more than 10 CPU cores were installed. The modified code will function with up to 99 cores. Change-Id: I62dc0eb61ae2e2b7f7dcf30e9c7de09cd901a81c Signed-off-by: Timothy Pearson Reviewed-on: http://review.coreboot.org/8422 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc Reviewed-by: Marc Jones --- src/arch/x86/boot/acpigen.c | 2 +- src/cpu/intel/fsp_model_206ax/acpi/cpu.asl | 74 ++++++++--------- src/cpu/intel/fsp_model_406dx/acpi/cpu.asl | 74 ++++++++--------- src/cpu/intel/haswell/acpi/cpu.asl | 74 ++++++++--------- src/cpu/intel/model_206ax/acpi/cpu.asl | 74 ++++++++--------- src/cpu/intel/model_6dx/acpi/cpu.asl | 20 ++--- src/ec/quanta/ene_kb3940q/acpi/ec.asl | 10 +-- src/include/cpu/intel/speedstep.h | 2 +- src/mainboard/amd/dbm690t/fadt.c | 2 +- src/mainboard/amd/pistachio/fadt.c | 2 +- src/mainboard/amd/torpedo/fadt.c | 2 +- src/mainboard/getac/p470/acpi/ec.asl | 2 +- src/mainboard/getac/p470/acpi/platform.asl | 10 +-- src/mainboard/getac/p470/acpi/thermal.asl | 4 +- src/mainboard/ibase/mb899/acpi/thermal.asl | 4 +- src/mainboard/intel/d945gclf/acpi/thermal.asl | 4 +- src/mainboard/iwave/iWRainbowG6/acpi/thermal.asl | 4 +- src/mainboard/kontron/986lcd-m/acpi/thermal.asl | 4 +- src/mainboard/kontron/kt690/fadt.c | 2 +- src/mainboard/lenovo/x200/acpi/platform.asl | 16 ++-- src/mainboard/roda/rk886ex/acpi/thermal.asl | 4 +- src/mainboard/roda/rk9/acpi/platform.asl | 16 ++-- src/mainboard/roda/rk9/acpi/thermal.asl | 4 +- .../siemens/sitemp_g1p1/acpi/platform.asl | 4 +- src/mainboard/siemens/sitemp_g1p1/acpi/thermal.asl | 4 +- src/mainboard/siemens/sitemp_g1p1/fadt.c | 2 +- src/mainboard/technexion/tim5690/fadt.c | 2 +- src/mainboard/technexion/tim8690/fadt.c | 2 +- src/mainboard/via/vt8454c/dsdt.asl | 2 +- src/northbridge/amd/amdk8/thermal_mixin.asl | 6 +- .../intel/fsp_sandybridge/acpi/hostbridge.asl | 6 +- src/northbridge/intel/haswell/acpi/hostbridge.asl | 6 +- src/northbridge/intel/nehalem/acpi/hostbridge.asl | 6 +- .../intel/sandybridge/acpi/hostbridge.asl | 6 +- src/soc/intel/baytrail/acpi/cpu.asl | 38 ++++----- src/soc/intel/baytrail/acpi/dptf/cpu.asl | 38 ++++----- src/soc/intel/broadwell/acpi/cpu.asl | 94 +++++++++++----------- src/soc/intel/broadwell/acpi/ctdp.asl | 6 +- src/soc/intel/fsp_baytrail/acpi/cpu.asl | 38 ++++----- src/southbridge/amd/agesa/hudson/hudson.c | 2 +- src/southbridge/amd/cimx/sb800/fadt.c | 2 +- src/southbridge/amd/pi/hudson/hudson.c | 2 +- src/southbridge/amd/sb700/early_setup.c | 2 +- src/southbridge/amd/sb800/early_setup.c | 2 +- 44 files changed, 340 insertions(+), 340 deletions(-) (limited to 'src') diff --git a/src/arch/x86/boot/acpigen.c b/src/arch/x86/boot/acpigen.c index 8e7ce463c1..76fe2d6873 100644 --- a/src/arch/x86/boot/acpigen.c +++ b/src/arch/x86/boot/acpigen.c @@ -293,7 +293,7 @@ int acpigen_write_processor(u8 cpuindex, u32 pblock_addr, u8 pblock_len) len = acpigen_write_len_f(); snprintf(pscope, sizeof (pscope), - "\\_PR.CPU%x", (unsigned int) cpuindex); + "\\_PR.CP%02d", (unsigned int) cpuindex); len += acpigen_emit_namestring(pscope); acpigen_emit_byte(cpuindex); acpigen_emit_byte(pblock_addr & 0xff); diff --git a/src/cpu/intel/fsp_model_206ax/acpi/cpu.asl b/src/cpu/intel/fsp_model_206ax/acpi/cpu.asl index 558a9d3663..472ac08d6c 100644 --- a/src/cpu/intel/fsp_model_206ax/acpi/cpu.asl +++ b/src/cpu/intel/fsp_model_206ax/acpi/cpu.asl @@ -20,31 +20,31 @@ */ /* These devices are created at runtime */ -External (\_PR.CPU0, DeviceObj) -External (\_PR.CPU1, DeviceObj) -External (\_PR.CPU2, DeviceObj) -External (\_PR.CPU3, DeviceObj) -External (\_PR.CPU4, DeviceObj) -External (\_PR.CPU5, DeviceObj) -External (\_PR.CPU6, DeviceObj) -External (\_PR.CPU7, DeviceObj) +External (\_PR.CP00, DeviceObj) +External (\_PR.CP01, DeviceObj) +External (\_PR.CP02, DeviceObj) +External (\_PR.CP03, DeviceObj) +External (\_PR.CP04, DeviceObj) +External (\_PR.CP05, DeviceObj) +External (\_PR.CP06, DeviceObj) +External (\_PR.CP07, DeviceObj) /* Notify OS to re-read CPU tables, assuming ^2 CPU count */ Method (PNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x81) // _CST - Notify (\_PR.CPU1, 0x81) // _CST + Notify (\_PR.CP00, 0x81) // _CST + Notify (\_PR.CP01, 0x81) // _CST } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x81) // _CST - Notify (\_PR.CPU3, 0x81) // _CST + Notify (\_PR.CP02, 0x81) // _CST + Notify (\_PR.CP03, 0x81) // _CST } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x81) // _CST - Notify (\_PR.CPU5, 0x81) // _CST - Notify (\_PR.CPU6, 0x81) // _CST - Notify (\_PR.CPU7, 0x81) // _CST + Notify (\_PR.CP04, 0x81) // _CST + Notify (\_PR.CP05, 0x81) // _CST + Notify (\_PR.CP06, 0x81) // _CST + Notify (\_PR.CP07, 0x81) // _CST } } @@ -52,18 +52,18 @@ Method (PNOT) Method (PPCN) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x80) // _PPC - Notify (\_PR.CPU1, 0x80) // _PPC + Notify (\_PR.CP00, 0x80) // _PPC + Notify (\_PR.CP01, 0x80) // _PPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x80) // _PPC - Notify (\_PR.CPU3, 0x80) // _PPC + Notify (\_PR.CP02, 0x80) // _PPC + Notify (\_PR.CP03, 0x80) // _PPC } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x80) // _PPC - Notify (\_PR.CPU5, 0x80) // _PPC - Notify (\_PR.CPU6, 0x80) // _PPC - Notify (\_PR.CPU7, 0x80) // _PPC + Notify (\_PR.CP04, 0x80) // _PPC + Notify (\_PR.CP05, 0x80) // _PPC + Notify (\_PR.CP06, 0x80) // _PPC + Notify (\_PR.CP07, 0x80) // _PPC } } @@ -71,18 +71,18 @@ Method (PPCN) Method (TNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x82) // _TPC - Notify (\_PR.CPU1, 0x82) // _TPC + Notify (\_PR.CP00, 0x82) // _TPC + Notify (\_PR.CP01, 0x82) // _TPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x82) // _TPC - Notify (\_PR.CPU3, 0x82) // _TPC + Notify (\_PR.CP02, 0x82) // _TPC + Notify (\_PR.CP03, 0x82) // _TPC } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x82) // _TPC - Notify (\_PR.CPU5, 0x82) // _TPC - Notify (\_PR.CPU6, 0x82) // _TPC - Notify (\_PR.CPU7, 0x82) // _TPC + Notify (\_PR.CP04, 0x82) // _TPC + Notify (\_PR.CP05, 0x82) // _TPC + Notify (\_PR.CP06, 0x82) // _TPC + Notify (\_PR.CP07, 0x82) // _TPC } } @@ -90,13 +90,13 @@ Method (TNOT) Method (PPKG) { If (LGreaterEqual (\PCNT, 8)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3, - \_PR.CPU4, \_PR.CPU5, \_PR.CPU6, \_PR.CPU7}) + Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03, + \_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07}) } ElseIf (LGreaterEqual (\PCNT, 4)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3}) + Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03}) } ElseIf (LGreaterEqual (\PCNT, 2)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1}) + Return (Package() {\_PR.CP00, \_PR.CP01}) } Else { - Return (Package() {\_PR.CPU0}) + Return (Package() {\_PR.CP00}) } } diff --git a/src/cpu/intel/fsp_model_406dx/acpi/cpu.asl b/src/cpu/intel/fsp_model_406dx/acpi/cpu.asl index 558a9d3663..472ac08d6c 100644 --- a/src/cpu/intel/fsp_model_406dx/acpi/cpu.asl +++ b/src/cpu/intel/fsp_model_406dx/acpi/cpu.asl @@ -20,31 +20,31 @@ */ /* These devices are created at runtime */ -External (\_PR.CPU0, DeviceObj) -External (\_PR.CPU1, DeviceObj) -External (\_PR.CPU2, DeviceObj) -External (\_PR.CPU3, DeviceObj) -External (\_PR.CPU4, DeviceObj) -External (\_PR.CPU5, DeviceObj) -External (\_PR.CPU6, DeviceObj) -External (\_PR.CPU7, DeviceObj) +External (\_PR.CP00, DeviceObj) +External (\_PR.CP01, DeviceObj) +External (\_PR.CP02, DeviceObj) +External (\_PR.CP03, DeviceObj) +External (\_PR.CP04, DeviceObj) +External (\_PR.CP05, DeviceObj) +External (\_PR.CP06, DeviceObj) +External (\_PR.CP07, DeviceObj) /* Notify OS to re-read CPU tables, assuming ^2 CPU count */ Method (PNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x81) // _CST - Notify (\_PR.CPU1, 0x81) // _CST + Notify (\_PR.CP00, 0x81) // _CST + Notify (\_PR.CP01, 0x81) // _CST } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x81) // _CST - Notify (\_PR.CPU3, 0x81) // _CST + Notify (\_PR.CP02, 0x81) // _CST + Notify (\_PR.CP03, 0x81) // _CST } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x81) // _CST - Notify (\_PR.CPU5, 0x81) // _CST - Notify (\_PR.CPU6, 0x81) // _CST - Notify (\_PR.CPU7, 0x81) // _CST + Notify (\_PR.CP04, 0x81) // _CST + Notify (\_PR.CP05, 0x81) // _CST + Notify (\_PR.CP06, 0x81) // _CST + Notify (\_PR.CP07, 0x81) // _CST } } @@ -52,18 +52,18 @@ Method (PNOT) Method (PPCN) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x80) // _PPC - Notify (\_PR.CPU1, 0x80) // _PPC + Notify (\_PR.CP00, 0x80) // _PPC + Notify (\_PR.CP01, 0x80) // _PPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x80) // _PPC - Notify (\_PR.CPU3, 0x80) // _PPC + Notify (\_PR.CP02, 0x80) // _PPC + Notify (\_PR.CP03, 0x80) // _PPC } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x80) // _PPC - Notify (\_PR.CPU5, 0x80) // _PPC - Notify (\_PR.CPU6, 0x80) // _PPC - Notify (\_PR.CPU7, 0x80) // _PPC + Notify (\_PR.CP04, 0x80) // _PPC + Notify (\_PR.CP05, 0x80) // _PPC + Notify (\_PR.CP06, 0x80) // _PPC + Notify (\_PR.CP07, 0x80) // _PPC } } @@ -71,18 +71,18 @@ Method (PPCN) Method (TNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x82) // _TPC - Notify (\_PR.CPU1, 0x82) // _TPC + Notify (\_PR.CP00, 0x82) // _TPC + Notify (\_PR.CP01, 0x82) // _TPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x82) // _TPC - Notify (\_PR.CPU3, 0x82) // _TPC + Notify (\_PR.CP02, 0x82) // _TPC + Notify (\_PR.CP03, 0x82) // _TPC } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x82) // _TPC - Notify (\_PR.CPU5, 0x82) // _TPC - Notify (\_PR.CPU6, 0x82) // _TPC - Notify (\_PR.CPU7, 0x82) // _TPC + Notify (\_PR.CP04, 0x82) // _TPC + Notify (\_PR.CP05, 0x82) // _TPC + Notify (\_PR.CP06, 0x82) // _TPC + Notify (\_PR.CP07, 0x82) // _TPC } } @@ -90,13 +90,13 @@ Method (TNOT) Method (PPKG) { If (LGreaterEqual (\PCNT, 8)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3, - \_PR.CPU4, \_PR.CPU5, \_PR.CPU6, \_PR.CPU7}) + Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03, + \_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07}) } ElseIf (LGreaterEqual (\PCNT, 4)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3}) + Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03}) } ElseIf (LGreaterEqual (\PCNT, 2)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1}) + Return (Package() {\_PR.CP00, \_PR.CP01}) } Else { - Return (Package() {\_PR.CPU0}) + Return (Package() {\_PR.CP00}) } } diff --git a/src/cpu/intel/haswell/acpi/cpu.asl b/src/cpu/intel/haswell/acpi/cpu.asl index 558a9d3663..472ac08d6c 100644 --- a/src/cpu/intel/haswell/acpi/cpu.asl +++ b/src/cpu/intel/haswell/acpi/cpu.asl @@ -20,31 +20,31 @@ */ /* These devices are created at runtime */ -External (\_PR.CPU0, DeviceObj) -External (\_PR.CPU1, DeviceObj) -External (\_PR.CPU2, DeviceObj) -External (\_PR.CPU3, DeviceObj) -External (\_PR.CPU4, DeviceObj) -External (\_PR.CPU5, DeviceObj) -External (\_PR.CPU6, DeviceObj) -External (\_PR.CPU7, DeviceObj) +External (\_PR.CP00, DeviceObj) +External (\_PR.CP01, DeviceObj) +External (\_PR.CP02, DeviceObj) +External (\_PR.CP03, DeviceObj) +External (\_PR.CP04, DeviceObj) +External (\_PR.CP05, DeviceObj) +External (\_PR.CP06, DeviceObj) +External (\_PR.CP07, DeviceObj) /* Notify OS to re-read CPU tables, assuming ^2 CPU count */ Method (PNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x81) // _CST - Notify (\_PR.CPU1, 0x81) // _CST + Notify (\_PR.CP00, 0x81) // _CST + Notify (\_PR.CP01, 0x81) // _CST } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x81) // _CST - Notify (\_PR.CPU3, 0x81) // _CST + Notify (\_PR.CP02, 0x81) // _CST + Notify (\_PR.CP03, 0x81) // _CST } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x81) // _CST - Notify (\_PR.CPU5, 0x81) // _CST - Notify (\_PR.CPU6, 0x81) // _CST - Notify (\_PR.CPU7, 0x81) // _CST + Notify (\_PR.CP04, 0x81) // _CST + Notify (\_PR.CP05, 0x81) // _CST + Notify (\_PR.CP06, 0x81) // _CST + Notify (\_PR.CP07, 0x81) // _CST } } @@ -52,18 +52,18 @@ Method (PNOT) Method (PPCN) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x80) // _PPC - Notify (\_PR.CPU1, 0x80) // _PPC + Notify (\_PR.CP00, 0x80) // _PPC + Notify (\_PR.CP01, 0x80) // _PPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x80) // _PPC - Notify (\_PR.CPU3, 0x80) // _PPC + Notify (\_PR.CP02, 0x80) // _PPC + Notify (\_PR.CP03, 0x80) // _PPC } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x80) // _PPC - Notify (\_PR.CPU5, 0x80) // _PPC - Notify (\_PR.CPU6, 0x80) // _PPC - Notify (\_PR.CPU7, 0x80) // _PPC + Notify (\_PR.CP04, 0x80) // _PPC + Notify (\_PR.CP05, 0x80) // _PPC + Notify (\_PR.CP06, 0x80) // _PPC + Notify (\_PR.CP07, 0x80) // _PPC } } @@ -71,18 +71,18 @@ Method (PPCN) Method (TNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x82) // _TPC - Notify (\_PR.CPU1, 0x82) // _TPC + Notify (\_PR.CP00, 0x82) // _TPC + Notify (\_PR.CP01, 0x82) // _TPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x82) // _TPC - Notify (\_PR.CPU3, 0x82) // _TPC + Notify (\_PR.CP02, 0x82) // _TPC + Notify (\_PR.CP03, 0x82) // _TPC } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x82) // _TPC - Notify (\_PR.CPU5, 0x82) // _TPC - Notify (\_PR.CPU6, 0x82) // _TPC - Notify (\_PR.CPU7, 0x82) // _TPC + Notify (\_PR.CP04, 0x82) // _TPC + Notify (\_PR.CP05, 0x82) // _TPC + Notify (\_PR.CP06, 0x82) // _TPC + Notify (\_PR.CP07, 0x82) // _TPC } } @@ -90,13 +90,13 @@ Method (TNOT) Method (PPKG) { If (LGreaterEqual (\PCNT, 8)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3, - \_PR.CPU4, \_PR.CPU5, \_PR.CPU6, \_PR.CPU7}) + Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03, + \_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07}) } ElseIf (LGreaterEqual (\PCNT, 4)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3}) + Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03}) } ElseIf (LGreaterEqual (\PCNT, 2)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1}) + Return (Package() {\_PR.CP00, \_PR.CP01}) } Else { - Return (Package() {\_PR.CPU0}) + Return (Package() {\_PR.CP00}) } } diff --git a/src/cpu/intel/model_206ax/acpi/cpu.asl b/src/cpu/intel/model_206ax/acpi/cpu.asl index 558a9d3663..472ac08d6c 100644 --- a/src/cpu/intel/model_206ax/acpi/cpu.asl +++ b/src/cpu/intel/model_206ax/acpi/cpu.asl @@ -20,31 +20,31 @@ */ /* These devices are created at runtime */ -External (\_PR.CPU0, DeviceObj) -External (\_PR.CPU1, DeviceObj) -External (\_PR.CPU2, DeviceObj) -External (\_PR.CPU3, DeviceObj) -External (\_PR.CPU4, DeviceObj) -External (\_PR.CPU5, DeviceObj) -External (\_PR.CPU6, DeviceObj) -External (\_PR.CPU7, DeviceObj) +External (\_PR.CP00, DeviceObj) +External (\_PR.CP01, DeviceObj) +External (\_PR.CP02, DeviceObj) +External (\_PR.CP03, DeviceObj) +External (\_PR.CP04, DeviceObj) +External (\_PR.CP05, DeviceObj) +External (\_PR.CP06, DeviceObj) +External (\_PR.CP07, DeviceObj) /* Notify OS to re-read CPU tables, assuming ^2 CPU count */ Method (PNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x81) // _CST - Notify (\_PR.CPU1, 0x81) // _CST + Notify (\_PR.CP00, 0x81) // _CST + Notify (\_PR.CP01, 0x81) // _CST } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x81) // _CST - Notify (\_PR.CPU3, 0x81) // _CST + Notify (\_PR.CP02, 0x81) // _CST + Notify (\_PR.CP03, 0x81) // _CST } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x81) // _CST - Notify (\_PR.CPU5, 0x81) // _CST - Notify (\_PR.CPU6, 0x81) // _CST - Notify (\_PR.CPU7, 0x81) // _CST + Notify (\_PR.CP04, 0x81) // _CST + Notify (\_PR.CP05, 0x81) // _CST + Notify (\_PR.CP06, 0x81) // _CST + Notify (\_PR.CP07, 0x81) // _CST } } @@ -52,18 +52,18 @@ Method (PNOT) Method (PPCN) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x80) // _PPC - Notify (\_PR.CPU1, 0x80) // _PPC + Notify (\_PR.CP00, 0x80) // _PPC + Notify (\_PR.CP01, 0x80) // _PPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x80) // _PPC - Notify (\_PR.CPU3, 0x80) // _PPC + Notify (\_PR.CP02, 0x80) // _PPC + Notify (\_PR.CP03, 0x80) // _PPC } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x80) // _PPC - Notify (\_PR.CPU5, 0x80) // _PPC - Notify (\_PR.CPU6, 0x80) // _PPC - Notify (\_PR.CPU7, 0x80) // _PPC + Notify (\_PR.CP04, 0x80) // _PPC + Notify (\_PR.CP05, 0x80) // _PPC + Notify (\_PR.CP06, 0x80) // _PPC + Notify (\_PR.CP07, 0x80) // _PPC } } @@ -71,18 +71,18 @@ Method (PPCN) Method (TNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x82) // _TPC - Notify (\_PR.CPU1, 0x82) // _TPC + Notify (\_PR.CP00, 0x82) // _TPC + Notify (\_PR.CP01, 0x82) // _TPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x82) // _TPC - Notify (\_PR.CPU3, 0x82) // _TPC + Notify (\_PR.CP02, 0x82) // _TPC + Notify (\_PR.CP03, 0x82) // _TPC } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x82) // _TPC - Notify (\_PR.CPU5, 0x82) // _TPC - Notify (\_PR.CPU6, 0x82) // _TPC - Notify (\_PR.CPU7, 0x82) // _TPC + Notify (\_PR.CP04, 0x82) // _TPC + Notify (\_PR.CP05, 0x82) // _TPC + Notify (\_PR.CP06, 0x82) // _TPC + Notify (\_PR.CP07, 0x82) // _TPC } } @@ -90,13 +90,13 @@ Method (TNOT) Method (PPKG) { If (LGreaterEqual (\PCNT, 8)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3, - \_PR.CPU4, \_PR.CPU5, \_PR.CPU6, \_PR.CPU7}) + Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03, + \_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07}) } ElseIf (LGreaterEqual (\PCNT, 4)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3}) + Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03}) } ElseIf (LGreaterEqual (\PCNT, 2)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1}) + Return (Package() {\_PR.CP00, \_PR.CP01}) } Else { - Return (Package() {\_PR.CPU0}) + Return (Package() {\_PR.CP00}) } } diff --git a/src/cpu/intel/model_6dx/acpi/cpu.asl b/src/cpu/intel/model_6dx/acpi/cpu.asl index 8928c3823f..04438a227a 100644 --- a/src/cpu/intel/model_6dx/acpi/cpu.asl +++ b/src/cpu/intel/model_6dx/acpi/cpu.asl @@ -4,34 +4,34 @@ External(PDC1) // Power notification -External (\_PR_.CPU0, DeviceObj) -External (\_PR_.CPU1, DeviceObj) -External (\_PR_.CPU0._PPC) -External (\_PR_.CPU1._PPC) +External (\_PR_.CP00, DeviceObj) +External (\_PR_.CP01, DeviceObj) +External (\_PR_.CP00._PPC) +External (\_PR_.CP01._PPC) Method (PNOT) { If (MPEN) { If(And(PDC0, 0x08)) { - Notify (\_PR_.CPU0, 0x80) // _PPC + Notify (\_PR_.CP00, 0x80) // _PPC If (And(PDC0, 0x10)) { Sleep(100) - Notify(\_PR_.CPU0, 0x81) // _CST + Notify(\_PR_.CP00, 0x81) // _CST } } If(And(PDC1, 0x08)) { - Notify (\_PR_.CPU1, 0x80) // _PPC + Notify (\_PR_.CP01, 0x80) // _PPC If (And(PDC1, 0x10)) { Sleep(100) - Notify(\_PR_.CPU1, 0x81) // _CST + Notify(\_PR_.CP01, 0x81) // _CST } } } Else { // UP - Notify (\_PR_.CPU0, 0x80) + Notify (\_PR_.CP00, 0x80) Sleep(0x64) - Notify(\_PR_.CPU0, 0x81) + Notify(\_PR_.CP00, 0x81) } } diff --git a/src/ec/quanta/ene_kb3940q/acpi/ec.asl b/src/ec/quanta/ene_kb3940q/acpi/ec.asl index 4e703feca5..3d9aa6215e 100644 --- a/src/ec/quanta/ene_kb3940q/acpi/ec.asl +++ b/src/ec/quanta/ene_kb3940q/acpi/ec.asl @@ -23,7 +23,7 @@ * re-evaluate their _PPC and _CST tables. */ -External (\_PR.CPU0._PPC, IntObj) +External (\_PR.CP00._PPC, IntObj) Device (EC0) { @@ -148,12 +148,12 @@ Device (EC0) Store (CTMP, Local0) // Find and program number of P-States - Store (SizeOf (\_PR.CPU0._PSS), MPST) + Store (SizeOf (\_PR.CP00._PSS), MPST) Store ("Programming number of P-states: ", Debug) Store (MPST, Debug) // Find and program the current P-State - Store(\_PR.CPU0._PPC, NPST) + Store(\_PR.CP00._PPC, NPST) Store ("Programming Current P-state: ", Debug) Store (NPST, Debug) } @@ -192,7 +192,7 @@ Device (EC0) { Store ("Pstate Event 0x0E", Debug) - Store(\_PR.CPU0._PPC, Local0) + Store(\_PR.CP00._PPC, Local0) Subtract(PPCM, 0x01, Local1) If(LLess(Local0, Local1)) { @@ -207,7 +207,7 @@ Device (EC0) Method (_Q0F) { Store ("Pstate Event 0x0F", Debug) - Store(\_PR.CPU0._PPC, Local0) + Store(\_PR.CP00._PPC, Local0) If(Local0) { Decrement(Local0) diff --git a/src/include/cpu/intel/speedstep.h b/src/include/cpu/intel/speedstep.h index 8bfae60c1f..eb8b50607c 100644 --- a/src/include/cpu/intel/speedstep.h +++ b/src/include/cpu/intel/speedstep.h @@ -29,7 +29,7 @@ #define SPEEDSTEP_APIC_MAGIC 0xACAC /* MWAIT coordination I/O base address. This must match - * the \_PR_.CPU0 PM base address. + * the \_PR_.CP00 PM base address. */ #define PMB0_BASE 0x510 diff --git a/src/mainboard/amd/dbm690t/fadt.c b/src/mainboard/amd/dbm690t/fadt.c index c238cbeeb5..ec75a65214 100644 --- a/src/mainboard/amd/dbm690t/fadt.c +++ b/src/mainboard/amd/dbm690t/fadt.c @@ -79,7 +79,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) pm_iowrite(0x28, ACPI_GPE0_BLK & 0xFF); pm_iowrite(0x29, ACPI_GPE0_BLK >> 8); - /* CpuControl is in \_PR.CPU0, 6 bytes */ + /* CpuControl is in \_PR.CP00, 6 bytes */ pm_iowrite(0x26, ACPI_CPU_CONTORL & 0xFF); pm_iowrite(0x27, ACPI_CPU_CONTORL >> 8); diff --git a/src/mainboard/amd/pistachio/fadt.c b/src/mainboard/amd/pistachio/fadt.c index c238cbeeb5..ec75a65214 100644 --- a/src/mainboard/amd/pistachio/fadt.c +++ b/src/mainboard/amd/pistachio/fadt.c @@ -79,7 +79,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) pm_iowrite(0x28, ACPI_GPE0_BLK & 0xFF); pm_iowrite(0x29, ACPI_GPE0_BLK >> 8); - /* CpuControl is in \_PR.CPU0, 6 bytes */ + /* CpuControl is in \_PR.CP00, 6 bytes */ pm_iowrite(0x26, ACPI_CPU_CONTORL & 0xFF); pm_iowrite(0x27, ACPI_CPU_CONTORL >> 8); diff --git a/src/mainboard/amd/torpedo/fadt.c b/src/mainboard/amd/torpedo/fadt.c index 4bc88aca8f..5d66791806 100644 --- a/src/mainboard/amd/torpedo/fadt.c +++ b/src/mainboard/amd/torpedo/fadt.c @@ -81,7 +81,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) val = GPE0_BLK_ADDRESS; WritePMIO(SB_PMIOA_REG68, AccWidthUint16, &val); - /* CpuControl is in \_PR.CPU0, 6 bytes */ + /* CpuControl is in \_PR.CP00, 6 bytes */ val = CPU_CNT_BLK_ADDRESS; WritePMIO(SB_PMIOA_REG66, AccWidthUint16, &val); val = 0; diff --git a/src/mainboard/getac/p470/acpi/ec.asl b/src/mainboard/getac/p470/acpi/ec.asl index 1b1c157dfd..70e422485c 100644 --- a/src/mainboard/getac/p470/acpi/ec.asl +++ b/src/mainboard/getac/p470/acpi/ec.asl @@ -105,7 +105,7 @@ Device(EC0) // EC Query methods, called upon SCI interrupts. Method (_Q01, 0) { - Notify (\_PR.CPU0, 0x80) + Notify (\_PR.CP00, 0x80) If(ADP) { Store(1, \_SB.AC.ACST) TRAP(0xe3) diff --git a/src/mainboard/getac/p470/acpi/platform.asl b/src/mainboard/getac/p470/acpi/platform.asl index 2b081e0de4..cad5a71815 100644 --- a/src/mainboard/getac/p470/acpi/platform.asl +++ b/src/mainboard/getac/p470/acpi/platform.asl @@ -95,15 +95,15 @@ Method(_WAK,1) // Windows XP SP2 P-State restore If (LAnd(LEqual(OSYS, 2002), And(CFGD, 1))) { - If (LGreater(\_PR.CPU0._PPC, 0)) { - Subtract(\_PR.CPU0._PPC, 1, \_PR.CPU0._PPC) + If (LGreater(\_PR.CP00._PPC, 0)) { + Subtract(\_PR.CP00._PPC, 1, \_PR.CP00._PPC) PNOT() - Add(\_PR.CPU0._PPC, 1, \_PR.CPU0._PPC) + Add(\_PR.CP00._PPC, 1, \_PR.CP00._PPC) PNOT() } Else { - Add(\_PR.CPU0._PPC, 1, \_PR.CPU0._PPC) + Add(\_PR.CP00._PPC, 1, \_PR.CP00._PPC) PNOT() - Subtract(\_PR.CPU0._PPC, 1, \_PR.CPU0._PPC) + Subtract(\_PR.CP00._PPC, 1, \_PR.CP00._PPC) PNOT() } } diff --git a/src/mainboard/getac/p470/acpi/thermal.asl b/src/mainboard/getac/p470/acpi/thermal.asl index eefc1b73e7..f103561b99 100644 --- a/src/mainboard/getac/p470/acpi/thermal.asl +++ b/src/mainboard/getac/p470/acpi/thermal.asl @@ -79,9 +79,9 @@ Scope (\_TZ) Method (_PSL, 0, Serialized) { If (MPEN) { - Return (Package() {\_PR.CPU0, \_PR.CPU1}) + Return (Package() {\_PR.CP00, \_PR.CP01}) } - Return (Package() {\_PR.CPU0}) + Return (Package() {\_PR.CP00}) } // TC1 value for passive cooling diff --git a/src/mainboard/ibase/mb899/acpi/thermal.asl b/src/mainboard/ibase/mb899/acpi/thermal.asl index 128d677342..c5994d5b7a 100644 --- a/src/mainboard/ibase/mb899/acpi/thermal.asl +++ b/src/mainboard/ibase/mb899/acpi/thermal.asl @@ -65,9 +65,9 @@ Scope (\_TZ) Method (_PSL, 0, Serialized) { If (MPEN) { - Return (Package() {\_PR.CPU1, \_PR.CPU2}) + Return (Package() {\_PR.CP01, \_PR.CP02}) } - Return (Package() {\_PR.CPU1}) + Return (Package() {\_PR.CP01}) } // TC1 value for passive cooling diff --git a/src/mainboard/intel/d945gclf/acpi/thermal.asl b/src/mainboard/intel/d945gclf/acpi/thermal.asl index fc9f24e6bb..10e241dea0 100644 --- a/src/mainboard/intel/d945gclf/acpi/thermal.asl +++ b/src/mainboard/intel/d945gclf/acpi/thermal.asl @@ -65,9 +65,9 @@ Scope (\_TZ) Method (_PSL, 0, Serialized) { If (MPEN) { - Return (Package() {\_PR.CPU1, \_PR.CPU2}) + Return (Package() {\_PR.CP01, \_PR.CP02}) } - Return (Package() {\_PR.CPU1}) + Return (Package() {\_PR.CP01}) } // TC1 value for passive cooling diff --git a/src/mainboard/iwave/iWRainbowG6/acpi/thermal.asl b/src/mainboard/iwave/iWRainbowG6/acpi/thermal.asl index 53303098b4..1ba2338d8a 100644 --- a/src/mainboard/iwave/iWRainbowG6/acpi/thermal.asl +++ b/src/mainboard/iwave/iWRainbowG6/acpi/thermal.asl @@ -67,9 +67,9 @@ Scope (\_TZ) Method (_PSL, 0, Serialized) { If (MPEN) { - Return (Package() {\_PR.CPU1, \_PR.CPU2}) + Return (Package() {\_PR.CP01, \_PR.CP02}) } - Return (Package() {\_PR.CPU1}) + Return (Package() {\_PR.CP01}) } // TC1 value for passive cooling diff --git a/src/mainboard/kontron/986lcd-m/acpi/thermal.asl b/src/mainboard/kontron/986lcd-m/acpi/thermal.asl index 128d677342..c5994d5b7a 100644 --- a/src/mainboard/kontron/986lcd-m/acpi/thermal.asl +++ b/src/mainboard/kontron/986lcd-m/acpi/thermal.asl @@ -65,9 +65,9 @@ Scope (\_TZ) Method (_PSL, 0, Serialized) { If (MPEN) { - Return (Package() {\_PR.CPU1, \_PR.CPU2}) + Return (Package() {\_PR.CP01, \_PR.CP02}) } - Return (Package() {\_PR.CPU1}) + Return (Package() {\_PR.CP01}) } // TC1 value for passive cooling diff --git a/src/mainboard/kontron/kt690/fadt.c b/src/mainboard/kontron/kt690/fadt.c index c238cbeeb5..ec75a65214 100644 --- a/src/mainboard/kontron/kt690/fadt.c +++ b/src/mainboard/kontron/kt690/fadt.c @@ -79,7 +79,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) pm_iowrite(0x28, ACPI_GPE0_BLK & 0xFF); pm_iowrite(0x29, ACPI_GPE0_BLK >> 8); - /* CpuControl is in \_PR.CPU0, 6 bytes */ + /* CpuControl is in \_PR.CP00, 6 bytes */ pm_iowrite(0x26, ACPI_CPU_CONTORL & 0xFF); pm_iowrite(0x27, ACPI_CPU_CONTORL >> 8); diff --git a/src/mainboard/lenovo/x200/acpi/platform.asl b/src/mainboard/lenovo/x200/acpi/platform.asl index 19b1e00c4b..2aa556f580 100644 --- a/src/mainboard/lenovo/x200/acpi/platform.asl +++ b/src/mainboard/lenovo/x200/acpi/platform.asl @@ -100,33 +100,33 @@ Method(_WAK,1) // Power notification -External (\_PR_.CPU0, DeviceObj) -External (\_PR_.CPU1, DeviceObj) +External (\_PR_.CP00, DeviceObj) +External (\_PR_.CP01, DeviceObj) Method (PNOT) { If (MPEN) { If(And(PDC0, 0x08)) { - Notify (\_PR_.CPU0, 0x80) // _PPC + Notify (\_PR_.CP00, 0x80) // _PPC If (And(PDC0, 0x10)) { Sleep(100) - Notify(\_PR_.CPU0, 0x81) // _CST + Notify(\_PR_.CP00, 0x81) // _CST } } If(And(PDC1, 0x08)) { - Notify (\_PR_.CPU1, 0x80) // _PPC + Notify (\_PR_.CP01, 0x80) // _PPC If (And(PDC1, 0x10)) { Sleep(100) - Notify(\_PR_.CPU1, 0x81) // _CST + Notify(\_PR_.CP01, 0x81) // _CST } } } Else { // UP - Notify (\_PR_.CPU0, 0x80) + Notify (\_PR_.CP00, 0x80) Sleep(0x64) - Notify(\_PR_.CPU0, 0x81) + Notify(\_PR_.CP00, 0x81) } } diff --git a/src/mainboard/roda/rk886ex/acpi/thermal.asl b/src/mainboard/roda/rk886ex/acpi/thermal.asl index e445d3cf92..873b089d32 100644 --- a/src/mainboard/roda/rk886ex/acpi/thermal.asl +++ b/src/mainboard/roda/rk886ex/acpi/thermal.asl @@ -67,9 +67,9 @@ Scope (\_TZ) Method (_PSL, 0, Serialized) { If (MPEN) { - Return (Package() {\_PR.CPU0, \_PR.CPU1}) + Return (Package() {\_PR.CP00, \_PR.CP01}) } - Return (Package() {\_PR.CPU0}) + Return (Package() {\_PR.CP00}) } // TC1 value for passive cooling diff --git a/src/mainboard/roda/rk9/acpi/platform.asl b/src/mainboard/roda/rk9/acpi/platform.asl index 3d4a2148a8..decceaf8aa 100644 --- a/src/mainboard/roda/rk9/acpi/platform.asl +++ b/src/mainboard/roda/rk9/acpi/platform.asl @@ -100,33 +100,33 @@ Method(_WAK,1) // Power notification -External (\_PR_.CPU0, DeviceObj) -External (\_PR_.CPU1, DeviceObj) +External (\_PR_.CP00, DeviceObj) +External (\_PR_.CP01, DeviceObj) Method (PNOT) { If (MPEN) { If(And(PDC0, 0x08)) { - Notify (\_PR_.CPU0, 0x80) // _PPC + Notify (\_PR_.CP00, 0x80) // _PPC If (And(PDC0, 0x10)) { Sleep(100) - Notify(\_PR_.CPU0, 0x81) // _CST + Notify(\_PR_.CP00, 0x81) // _CST } } If(And(PDC1, 0x08)) { - Notify (\_PR_.CPU1, 0x80) // _PPC + Notify (\_PR_.CP01, 0x80) // _PPC If (And(PDC1, 0x10)) { Sleep(100) - Notify(\_PR_.CPU1, 0x81) // _CST + Notify(\_PR_.CP01, 0x81) // _CST } } } Else { // UP - Notify (\_PR_.CPU0, 0x80) + Notify (\_PR_.CP00, 0x80) Sleep(0x64) - Notify(\_PR_.CPU0, 0x81) + Notify(\_PR_.CP00, 0x81) } // Notify the Batteries diff --git a/src/mainboard/roda/rk9/acpi/thermal.asl b/src/mainboard/roda/rk9/acpi/thermal.asl index 6e28f1710f..f4868b42bf 100644 --- a/src/mainboard/roda/rk9/acpi/thermal.asl +++ b/src/mainboard/roda/rk9/acpi/thermal.asl @@ -86,9 +86,9 @@ Scope (\_TZ) Method (_PSL, 0, Serialized) { If (MPEN) { - Return (Package() {\_PR.CPU0, \_PR.CPU1}) + Return (Package() {\_PR.CP00, \_PR.CP01}) } - Return (Package() {\_PR.CPU0}) + Return (Package() {\_PR.CP00}) } // TC1 value for passive cooling diff --git a/src/mainboard/siemens/sitemp_g1p1/acpi/platform.asl b/src/mainboard/siemens/sitemp_g1p1/acpi/platform.asl index 8af607db0e..37daa36042 100644 --- a/src/mainboard/siemens/sitemp_g1p1/acpi/platform.asl +++ b/src/mainboard/siemens/sitemp_g1p1/acpi/platform.asl @@ -30,8 +30,8 @@ Method(_PIC, 1, NotSerialized) } } -External (\_PR.CPU0, DeviceObj) -External (\_PR.CPU1, DeviceObj) +External (\_PR.CP00, DeviceObj) +External (\_PR.CP01, DeviceObj) Scope(\_SB) { diff --git a/src/mainboard/siemens/sitemp_g1p1/acpi/thermal.asl b/src/mainboard/siemens/sitemp_g1p1/acpi/thermal.asl index 02b1df1b4f..fbcd0e7c83 100644 --- a/src/mainboard/siemens/sitemp_g1p1/acpi/thermal.asl +++ b/src/mainboard/siemens/sitemp_g1p1/acpi/thermal.asl @@ -56,9 +56,9 @@ Scope(\_TZ) { Method (_PSL, 0, Serialized) { If (MPEN) { - Return (Package() {\_PR.CPU0, \_PR.CPU1}) + Return (Package() {\_PR.CP00, \_PR.CP01}) } - Return (Package() {\_PR.CPU0}) + Return (Package() {\_PR.CP00}) } Method(_HOT,0) { /* return hot temp in tenths degree Kelvin */ diff --git a/src/mainboard/siemens/sitemp_g1p1/fadt.c b/src/mainboard/siemens/sitemp_g1p1/fadt.c index f9acfe4af6..d62caa0454 100644 --- a/src/mainboard/siemens/sitemp_g1p1/fadt.c +++ b/src/mainboard/siemens/sitemp_g1p1/fadt.c @@ -80,7 +80,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) pm_iowrite(0x28, ACPI_GPE0_BLK & 0xFF); pm_iowrite(0x29, ACPI_GPE0_BLK >> 8); - /* CpuControl is in \_PR.CPU0, 6 bytes */ + /* CpuControl is in \_PR.CP00, 6 bytes */ pm_iowrite(0x26, ACPI_CPU_CONTORL & 0xFF); pm_iowrite(0x27, ACPI_CPU_CONTORL >> 8); diff --git a/src/mainboard/technexion/tim5690/fadt.c b/src/mainboard/technexion/tim5690/fadt.c index c238cbeeb5..ec75a65214 100644 --- a/src/mainboard/technexion/tim5690/fadt.c +++ b/src/mainboard/technexion/tim5690/fadt.c @@ -79,7 +79,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) pm_iowrite(0x28, ACPI_GPE0_BLK & 0xFF); pm_iowrite(0x29, ACPI_GPE0_BLK >> 8); - /* CpuControl is in \_PR.CPU0, 6 bytes */ + /* CpuControl is in \_PR.CP00, 6 bytes */ pm_iowrite(0x26, ACPI_CPU_CONTORL & 0xFF); pm_iowrite(0x27, ACPI_CPU_CONTORL >> 8); diff --git a/src/mainboard/technexion/tim8690/fadt.c b/src/mainboard/technexion/tim8690/fadt.c index c238cbeeb5..ec75a65214 100644 --- a/src/mainboard/technexion/tim8690/fadt.c +++ b/src/mainboard/technexion/tim8690/fadt.c @@ -79,7 +79,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) pm_iowrite(0x28, ACPI_GPE0_BLK & 0xFF); pm_iowrite(0x29, ACPI_GPE0_BLK >> 8); - /* CpuControl is in \_PR.CPU0, 6 bytes */ + /* CpuControl is in \_PR.CP00, 6 bytes */ pm_iowrite(0x26, ACPI_CPU_CONTORL & 0xFF); pm_iowrite(0x27, ACPI_CPU_CONTORL >> 8); diff --git a/src/mainboard/via/vt8454c/dsdt.asl b/src/mainboard/via/vt8454c/dsdt.asl index d13a6b7765..4901041599 100644 --- a/src/mainboard/via/vt8454c/dsdt.asl +++ b/src/mainboard/via/vt8454c/dsdt.asl @@ -27,7 +27,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001) */ Scope (\_PR) { - Processor (\_PR.CPU0, 0x00, 0x00000410, 0x06) {} + Processor (\_PR.CP00, 0x00, 0x00000410, 0x06) {} } /* For now only define 2 power states: diff --git a/src/northbridge/amd/amdk8/thermal_mixin.asl b/src/northbridge/amd/amdk8/thermal_mixin.asl index 62590ff232..f6257a679e 100644 --- a/src/northbridge/amd/amdk8/thermal_mixin.asl +++ b/src/northbridge/amd/amdk8/thermal_mixin.asl @@ -139,7 +139,7 @@ ThermalZone (K8T1) { Name(_UID, "k8-1") Name(_STR, Unicode("K8 compatible CPU Core 1 Thermal Sensor 2")) - Name(_TZD, Package () {\_PR.CPU0}) + Name(_TZD, Package () {\_PR.CP00}) Method(_STA) { Store(CORE, Local0) @@ -190,7 +190,7 @@ ThermalZone (K8T2) { Name(_UID, "k8-2") Name(_STR, Unicode("K8 compatible CPU Core 2 Thermal Sensor 1")) - Name(_TZD, Package () {\_PR.CPU0}) + Name(_TZD, Package () {\_PR.CP00}) Method(_STA) { Store(CORE, Local0) @@ -241,7 +241,7 @@ ThermalZone (K8T3) { Name(_UID, "k8-3") Name(_STR, Unicode("K8 compatible CPU Core 2 Thermal Sensor 2")) - Name(_TZD, Package () {\_PR.CPU0}) + Name(_TZD, Package () {\_PR.CP00}) Method(_STA) { Store(CORE, Local0) diff --git a/src/northbridge/intel/fsp_sandybridge/acpi/hostbridge.asl b/src/northbridge/intel/fsp_sandybridge/acpi/hostbridge.asl index e569cf30b2..e82758c494 100644 --- a/src/northbridge/intel/fsp_sandybridge/acpi/hostbridge.asl +++ b/src/northbridge/intel/fsp_sandybridge/acpi/hostbridge.asl @@ -147,16 +147,16 @@ Device (MCHC) * Package (6) { freq, power, tlat, blat, control, status } * } */ - External (\_PR.CPU0._PSS) + External (\_PR.CP00._PSS) Method (PSSS, 1, NotSerialized) { Store (One, Local0) /* Start at P1 */ - Store (SizeOf (\_PR.CPU0._PSS), Local1) + Store (SizeOf (\_PR.CP00._PSS), Local1) While (LLess (Local0, Local1)) { /* Store _PSS entry Control value to Local2 */ ShiftRight (DeRefOf (Index (DeRefOf (Index - (\_PR.CPU0._PSS, Local0)), 4)), 8, Local2) + (\_PR.CP00._PSS, Local0)), 4)), 8, Local2) If (LEqual (Local2, Arg0)) { Return (Subtract (Local0, 1)) } diff --git a/src/northbridge/intel/haswell/acpi/hostbridge.asl b/src/northbridge/intel/haswell/acpi/hostbridge.asl index bb8e95ef0b..9bc5549041 100644 --- a/src/northbridge/intel/haswell/acpi/hostbridge.asl +++ b/src/northbridge/intel/haswell/acpi/hostbridge.asl @@ -157,16 +157,16 @@ Device (MCHC) * Package (6) { freq, power, tlat, blat, control, status } * } */ - External (\_PR.CPU0._PSS) + External (\_PR.CP00._PSS) Method (PSSS, 1, NotSerialized) { Store (One, Local0) /* Start at P1 */ - Store (SizeOf (\_PR.CPU0._PSS), Local1) + Store (SizeOf (\_PR.CP00._PSS), Local1) While (LLess (Local0, Local1)) { /* Store _PSS entry Control value to Local2 */ ShiftRight (DeRefOf (Index (DeRefOf (Index - (\_PR.CPU0._PSS, Local0)), 4)), 8, Local2) + (\_PR.CP00._PSS, Local0)), 4)), 8, Local2) If (LEqual (Local2, Arg0)) { Return (Subtract (Local0, 1)) } diff --git a/src/northbridge/intel/nehalem/acpi/hostbridge.asl b/src/northbridge/intel/nehalem/acpi/hostbridge.asl index 79736bcafd..d210a95064 100644 --- a/src/northbridge/intel/nehalem/acpi/hostbridge.asl +++ b/src/northbridge/intel/nehalem/acpi/hostbridge.asl @@ -109,16 +109,16 @@ Device (MCHC) * Package (6) { freq, power, tlat, blat, control, status } * } */ - External (\_PR.CPU0._PSS) + External (\_PR.CP00._PSS) Method (PSSS, 1, NotSerialized) { Store (One, Local0) /* Start at P1 */ - Store (SizeOf (\_PR.CPU0._PSS), Local1) + Store (SizeOf (\_PR.CP00._PSS), Local1) While (LLess (Local0, Local1)) { /* Store _PSS entry Control value to Local2 */ ShiftRight (DeRefOf (Index (DeRefOf (Index - (\_PR.CPU0._PSS, Local0)), 4)), 8, Local2) + (\_PR.CP00._PSS, Local0)), 4)), 8, Local2) If (LEqual (Local2, Arg0)) { Return (Subtract (Local0, 1)) } diff --git a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl index 427927182d..26f7514646 100644 --- a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl +++ b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl @@ -147,16 +147,16 @@ Device (MCHC) * Package (6) { freq, power, tlat, blat, control, status } * } */ - External (\_PR.CPU0._PSS) + External (\_PR.CP00._PSS) Method (PSSS, 1, NotSerialized) { Store (One, Local0) /* Start at P1 */ - Store (SizeOf (\_PR.CPU0._PSS), Local1) + Store (SizeOf (\_PR.CP00._PSS), Local1) While (LLess (Local0, Local1)) { /* Store _PSS entry Control value to Local2 */ ShiftRight (DeRefOf (Index (DeRefOf (Index - (\_PR.CPU0._PSS, Local0)), 4)), 8, Local2) + (\_PR.CP00._PSS, Local0)), 4)), 8, Local2) If (LEqual (Local2, Arg0)) { Return (Subtract (Local0, 1)) } diff --git a/src/soc/intel/baytrail/acpi/cpu.asl b/src/soc/intel/baytrail/acpi/cpu.asl index 16f62ba309..f7e404daba 100644 --- a/src/soc/intel/baytrail/acpi/cpu.asl +++ b/src/soc/intel/baytrail/acpi/cpu.asl @@ -20,21 +20,21 @@ */ /* These devices are created at runtime */ -External (\_PR.CPU0, DeviceObj) -External (\_PR.CPU1, DeviceObj) -External (\_PR.CPU2, DeviceObj) -External (\_PR.CPU3, DeviceObj) +External (\_PR.CP00, DeviceObj) +External (\_PR.CP01, DeviceObj) +External (\_PR.CP02, DeviceObj) +External (\_PR.CP03, DeviceObj) /* Notify OS to re-read CPU tables, assuming ^2 CPU count */ Method (PNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x81) // _CST - Notify (\_PR.CPU1, 0x81) // _CST + Notify (\_PR.CP00, 0x81) // _CST + Notify (\_PR.CP01, 0x81) // _CST } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x81) // _CST - Notify (\_PR.CPU3, 0x81) // _CST + Notify (\_PR.CP02, 0x81) // _CST + Notify (\_PR.CP03, 0x81) // _CST } } @@ -42,12 +42,12 @@ Method (PNOT) Method (PPCN) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x80) // _PPC - Notify (\_PR.CPU1, 0x80) // _PPC + Notify (\_PR.CP00, 0x80) // _PPC + Notify (\_PR.CP01, 0x80) // _PPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x80) // _PPC - Notify (\_PR.CPU3, 0x80) // _PPC + Notify (\_PR.CP02, 0x80) // _PPC + Notify (\_PR.CP03, 0x80) // _PPC } } @@ -55,12 +55,12 @@ Method (PPCN) Method (TNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x82) // _TPC - Notify (\_PR.CPU1, 0x82) // _TPC + Notify (\_PR.CP00, 0x82) // _TPC + Notify (\_PR.CP01, 0x82) // _TPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x82) // _TPC - Notify (\_PR.CPU3, 0x82) // _TPC + Notify (\_PR.CP02, 0x82) // _TPC + Notify (\_PR.CP03, 0x82) // _TPC } } @@ -68,10 +68,10 @@ Method (TNOT) Method (PPKG) { If (LGreaterEqual (\PCNT, 4)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3}) + Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03}) } ElseIf (LGreaterEqual (\PCNT, 2)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1}) + Return (Package() {\_PR.CP00, \_PR.CP01}) } Else { - Return (Package() {\_PR.CPU0}) + Return (Package() {\_PR.CP00}) } } diff --git a/src/soc/intel/baytrail/acpi/dptf/cpu.asl b/src/soc/intel/baytrail/acpi/dptf/cpu.asl index 3cbfc5f672..58c1c7bea7 100644 --- a/src/soc/intel/baytrail/acpi/dptf/cpu.asl +++ b/src/soc/intel/baytrail/acpi/dptf/cpu.asl @@ -1,8 +1,8 @@ -External (\_PR.CPU0._TSS, MethodObj) -External (\_PR.CPU0._TPC, MethodObj) -External (\_PR.CPU0._PTC, PkgObj) -External (\_PR.CPU0._TSD, PkgObj) -External (\_PR.CPU0._PSS, MethodObj) +External (\_PR.CP00._TSS, MethodObj) +External (\_PR.CP00._TPC, MethodObj) +External (\_PR.CP00._PTC, PkgObj) +External (\_PR.CP00._TSD, PkgObj) +External (\_PR.CP00._PSS, MethodObj) Device (TCPU) { @@ -24,8 +24,8 @@ Device (TCPU) Method (_TSS) { - If (CondRefOf (\_PR.CPU0._TSS)) { - Return (\_PR.CPU0._TSS) + If (CondRefOf (\_PR.CP00._TSS)) { + Return (\_PR.CP00._TSS) } Else { Return (Package () { @@ -36,8 +36,8 @@ Device (TCPU) Method (_TPC) { - If (CondRefOf (\_PR.CPU0._TPC)) { - Return (\_PR.CPU0._TPC) + If (CondRefOf (\_PR.CP00._TPC)) { + Return (\_PR.CP00._TPC) } Else { Return (0) } @@ -45,8 +45,8 @@ Device (TCPU) Method (_PTC) { - If (CondRefOf (\_PR.CPU0._PTC)) { - Return (\_PR.CPU0._PTC) + If (CondRefOf (\_PR.CP00._PTC)) { + Return (\_PR.CP00._PTC) } Else { Return (Package () { @@ -58,8 +58,8 @@ Device (TCPU) Method (_TSD) { - If (CondRefOf (\_PR.CPU0._TSD)) { - Return (\_PR.CPU0._TSD) + If (CondRefOf (\_PR.CP00._TSD)) { + Return (\_PR.CP00._TSD) } Else { Return (Package () { @@ -70,8 +70,8 @@ Device (TCPU) Method (_TDL) { - If (CondRefOf (\_PR.CPU0._TSS)) { - Store (SizeOf (\_PR.CPU0._TSS ()), Local0) + If (CondRefOf (\_PR.CP00._TSS)) { + Store (SizeOf (\_PR.CP00._TSS ()), Local0) Decrement (Local0) Return (Local0) } Else { @@ -98,8 +98,8 @@ Device (TCPU) Method (_PSS) { - If (CondRefOf (\_PR.CPU0._PSS)) { - Return (\_PR.CPU0._PSS) + If (CondRefOf (\_PR.CP00._PSS)) { + Return (\_PR.CP00._PSS) } Else { Return (Package () { @@ -113,8 +113,8 @@ Device (TCPU) /* Check for mainboard specific _PDL override */ If (CondRefOf (\_SB.MPDL)) { Return (\_SB.MPDL) - } ElseIf (CondRefOf (\_PR.CPU0._PSS)) { - Store (SizeOf (\_PR.CPU0._PSS ()), Local0) + } ElseIf (CondRefOf (\_PR.CP00._PSS)) { + Store (SizeOf (\_PR.CP00._PSS ()), Local0) Decrement (Local0) Return (Local0) } Else { diff --git a/src/soc/intel/broadwell/acpi/cpu.asl b/src/soc/intel/broadwell/acpi/cpu.asl index f0da2dedd6..2921ceae5e 100644 --- a/src/soc/intel/broadwell/acpi/cpu.asl +++ b/src/soc/intel/broadwell/acpi/cpu.asl @@ -18,31 +18,31 @@ */ /* These devices are created at runtime */ -External (\_PR.CPU0, DeviceObj) -External (\_PR.CPU1, DeviceObj) -External (\_PR.CPU2, DeviceObj) -External (\_PR.CPU3, DeviceObj) -External (\_PR.CPU4, DeviceObj) -External (\_PR.CPU5, DeviceObj) -External (\_PR.CPU6, DeviceObj) -External (\_PR.CPU7, DeviceObj) +External (\_PR.CP00, DeviceObj) +External (\_PR.CP01, DeviceObj) +External (\_PR.CP02, DeviceObj) +External (\_PR.CP03, DeviceObj) +External (\_PR.CP04, DeviceObj) +External (\_PR.CP05, DeviceObj) +External (\_PR.CP06, DeviceObj) +External (\_PR.CP07, DeviceObj) /* Notify OS to re-read CPU tables, assuming ^2 CPU count */ Method (PNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x81) // _CST - Notify (\_PR.CPU1, 0x81) // _CST + Notify (\_PR.CP00, 0x81) // _CST + Notify (\_PR.CP01, 0x81) // _CST } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x81) // _CST - Notify (\_PR.CPU3, 0x81) // _CST + Notify (\_PR.CP02, 0x81) // _CST + Notify (\_PR.CP03, 0x81) // _CST } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x81) // _CST - Notify (\_PR.CPU5, 0x81) // _CST - Notify (\_PR.CPU6, 0x81) // _CST - Notify (\_PR.CPU7, 0x81) // _CST + Notify (\_PR.CP04, 0x81) // _CST + Notify (\_PR.CP05, 0x81) // _CST + Notify (\_PR.CP06, 0x81) // _CST + Notify (\_PR.CP07, 0x81) // _CST } } @@ -50,18 +50,18 @@ Method (PNOT) Method (PPCN) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x80) // _PPC - Notify (\_PR.CPU1, 0x80) // _PPC + Notify (\_PR.CP00, 0x80) // _PPC + Notify (\_PR.CP01, 0x80) // _PPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x80) // _PPC - Notify (\_PR.CPU3, 0x80) // _PPC + Notify (\_PR.CP02, 0x80) // _PPC + Notify (\_PR.CP03, 0x80) // _PPC } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x80) // _PPC - Notify (\_PR.CPU5, 0x80) // _PPC - Notify (\_PR.CPU6, 0x80) // _PPC - Notify (\_PR.CPU7, 0x80) // _PPC + Notify (\_PR.CP04, 0x80) // _PPC + Notify (\_PR.CP05, 0x80) // _PPC + Notify (\_PR.CP06, 0x80) // _PPC + Notify (\_PR.CP07, 0x80) // _PPC } } @@ -69,18 +69,18 @@ Method (PPCN) Method (TNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x82) // _TPC - Notify (\_PR.CPU1, 0x82) // _TPC + Notify (\_PR.CP00, 0x82) // _TPC + Notify (\_PR.CP01, 0x82) // _TPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x82) // _TPC - Notify (\_PR.CPU3, 0x82) // _TPC + Notify (\_PR.CP02, 0x82) // _TPC + Notify (\_PR.CP03, 0x82) // _TPC } If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CPU4, 0x82) // _TPC - Notify (\_PR.CPU5, 0x82) // _TPC - Notify (\_PR.CPU6, 0x82) // _TPC - Notify (\_PR.CPU7, 0x82) // _TPC + Notify (\_PR.CP04, 0x82) // _TPC + Notify (\_PR.CP05, 0x82) // _TPC + Notify (\_PR.CP06, 0x82) // _TPC + Notify (\_PR.CP07, 0x82) // _TPC } } @@ -90,33 +90,33 @@ Method (PPKG) If (LGreaterEqual (\PCNT, 8)) { Return (Package() { - \_PR.CPU0, - \_PR.CPU1, - \_PR.CPU2, - \_PR.CPU3, - \_PR.CPU4, - \_PR.CPU5, - \_PR.CPU6, - \_PR.CPU7 + \_PR.CP00, + \_PR.CP01, + \_PR.CP02, + \_PR.CP03, + \_PR.CP04, + \_PR.CP05, + \_PR.CP06, + \_PR.CP07 }) } ElseIf (LGreaterEqual (\PCNT, 4)) { Return (Package () { - \_PR.CPU0, - \_PR.CPU1, - \_PR.CPU2, - \_PR.CPU3 + \_PR.CP00, + \_PR.CP01, + \_PR.CP02, + \_PR.CP03 }) } ElseIf (LGreaterEqual (\PCNT, 2)) { Return (Package () { - \_PR.CPU0, - \_PR.CPU1 + \_PR.CP00, + \_PR.CP01 }) } Else { Return (Package () { - \_PR.CPU0 + \_PR.CP00 }) } } diff --git a/src/soc/intel/broadwell/acpi/ctdp.asl b/src/soc/intel/broadwell/acpi/ctdp.asl index 2aefda979d..a2a8fb4d2c 100644 --- a/src/soc/intel/broadwell/acpi/ctdp.asl +++ b/src/soc/intel/broadwell/acpi/ctdp.asl @@ -76,16 +76,16 @@ Scope (\_SB.PCI0.MCHC) * Package (6) { freq, power, tlat, blat, control, status } * } */ - External (\_PR.CPU0._PSS) + External (\_PR.CP00._PSS) Method (PSSS, 1, NotSerialized) { Store (One, Local0) /* Start at P1 */ - Store (SizeOf (\_PR.CPU0._PSS), Local1) + Store (SizeOf (\_PR.CP00._PSS), Local1) While (LLess (Local0, Local1)) { /* Store _PSS entry Control value to Local2 */ ShiftRight (DeRefOf (Index (DeRefOf (Index - (\_PR.CPU0._PSS, Local0)), 4)), 8, Local2) + (\_PR.CP00._PSS, Local0)), 4)), 8, Local2) If (LEqual (Local2, Arg0)) { Return (Subtract (Local0, 1)) } diff --git a/src/soc/intel/fsp_baytrail/acpi/cpu.asl b/src/soc/intel/fsp_baytrail/acpi/cpu.asl index 16f62ba309..f7e404daba 100644 --- a/src/soc/intel/fsp_baytrail/acpi/cpu.asl +++ b/src/soc/intel/fsp_baytrail/acpi/cpu.asl @@ -20,21 +20,21 @@ */ /* These devices are created at runtime */ -External (\_PR.CPU0, DeviceObj) -External (\_PR.CPU1, DeviceObj) -External (\_PR.CPU2, DeviceObj) -External (\_PR.CPU3, DeviceObj) +External (\_PR.CP00, DeviceObj) +External (\_PR.CP01, DeviceObj) +External (\_PR.CP02, DeviceObj) +External (\_PR.CP03, DeviceObj) /* Notify OS to re-read CPU tables, assuming ^2 CPU count */ Method (PNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x81) // _CST - Notify (\_PR.CPU1, 0x81) // _CST + Notify (\_PR.CP00, 0x81) // _CST + Notify (\_PR.CP01, 0x81) // _CST } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x81) // _CST - Notify (\_PR.CPU3, 0x81) // _CST + Notify (\_PR.CP02, 0x81) // _CST + Notify (\_PR.CP03, 0x81) // _CST } } @@ -42,12 +42,12 @@ Method (PNOT) Method (PPCN) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x80) // _PPC - Notify (\_PR.CPU1, 0x80) // _PPC + Notify (\_PR.CP00, 0x80) // _PPC + Notify (\_PR.CP01, 0x80) // _PPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x80) // _PPC - Notify (\_PR.CPU3, 0x80) // _PPC + Notify (\_PR.CP02, 0x80) // _PPC + Notify (\_PR.CP03, 0x80) // _PPC } } @@ -55,12 +55,12 @@ Method (PPCN) Method (TNOT) { If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CPU0, 0x82) // _TPC - Notify (\_PR.CPU1, 0x82) // _TPC + Notify (\_PR.CP00, 0x82) // _TPC + Notify (\_PR.CP01, 0x82) // _TPC } If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CPU2, 0x82) // _TPC - Notify (\_PR.CPU3, 0x82) // _TPC + Notify (\_PR.CP02, 0x82) // _TPC + Notify (\_PR.CP03, 0x82) // _TPC } } @@ -68,10 +68,10 @@ Method (TNOT) Method (PPKG) { If (LGreaterEqual (\PCNT, 4)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3}) + Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03}) } ElseIf (LGreaterEqual (\PCNT, 2)) { - Return (Package() {\_PR.CPU0, \_PR.CPU1}) + Return (Package() {\_PR.CP00, \_PR.CP01}) } Else { - Return (Package() {\_PR.CPU0}) + Return (Package() {\_PR.CP00}) } } diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c index 4ddfea2b8e..6d05609539 100644 --- a/src/southbridge/amd/agesa/hudson/hudson.c +++ b/src/southbridge/amd/agesa/hudson/hudson.c @@ -147,7 +147,7 @@ static void hudson_init_acpi_ports(void) pm_write16(0x62, ACPI_PM1_CNT_BLK); pm_write16(0x64, ACPI_PM_TMR_BLK); pm_write16(0x68, ACPI_GPE0_BLK); - /* CpuControl is in \_PR.CPU0, 6 bytes */ + /* CpuControl is in \_PR.CP00, 6 bytes */ pm_write16(0x66, ACPI_CPU_CONTROL); if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)) { diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c index 9442edccfb..29313281ee 100644 --- a/src/southbridge/amd/cimx/sb800/fadt.c +++ b/src/southbridge/amd/cimx/sb800/fadt.c @@ -83,7 +83,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) val = GPE0_BLK_ADDRESS; WritePMIO(SB_PMIOA_REG68, AccWidthUint16, &val); - /* CpuControl is in \_PR.CPU0, 6 bytes */ + /* CpuControl is in \_PR.CP00, 6 bytes */ val = CPU_CNT_BLK_ADDRESS; WritePMIO(SB_PMIOA_REG66, AccWidthUint16, &val); val = 0; diff --git a/src/southbridge/amd/pi/hudson/hudson.c b/src/southbridge/amd/pi/hudson/hudson.c index 5c55065653..5db9d14d88 100644 --- a/src/southbridge/amd/pi/hudson/hudson.c +++ b/src/southbridge/amd/pi/hudson/hudson.c @@ -107,7 +107,7 @@ static void hudson_init_acpi_ports(void) pm_write16(0x62, ACPI_PM1_CNT_BLK); pm_write16(0x64, ACPI_PM_TMR_BLK); pm_write16(0x68, ACPI_GPE0_BLK); - /* CpuControl is in \_PR.CPU0, 6 bytes */ + /* CpuControl is in \_PR.CP00, 6 bytes */ pm_write16(0x66, ACPI_CPU_CONTROL); if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)) { diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index 855cbc49be..94f33b75de 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -56,7 +56,7 @@ static void sb700_acpi_init(void) pmio_write(0x28, ACPI_GPE0_BLK & 0xFF); pmio_write(0x29, ACPI_GPE0_BLK >> 8); - /* CpuControl is in \_PR.CPU0, 6 bytes */ + /* CpuControl is in \_PR.CP00, 6 bytes */ pmio_write(0x26, ACPI_CPU_CONTROL & 0xFF); pmio_write(0x27, ACPI_CPU_CONTROL >> 8); diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c index 24aa2007a5..69bc3bdbed 100644 --- a/src/southbridge/amd/sb800/early_setup.c +++ b/src/southbridge/amd/sb800/early_setup.c @@ -53,7 +53,7 @@ static void sb800_acpi_init(void) pmio_write(0x68, ACPI_GPE0_BLK & 0xFF); pmio_write(0x69, ACPI_GPE0_BLK >> 8); - /* CpuControl is in \_PR.CPU0, 6 bytes */ + /* CpuControl is in \_PR.CP00, 6 bytes */ pmio_write(0x66, ACPI_CPU_CONTROL & 0xFF); pmio_write(0x67, ACPI_CPU_CONTROL >> 8); -- cgit v1.2.3