From 02b29e2f5904055ccdc7eb7cce889bca1a514f3c Mon Sep 17 00:00:00 2001 From: Tony Huang Date: Thu, 23 May 2024 09:11:40 +0800 Subject: mb/google/ovis/var/deku: Set TCC_offset to 5 Adjust settings as recommended by thermal team. Set tcc_offset value to 5 in devicetree. BUG=b:308704811 BRANCH=firmware-rex-15709.B TEST=emerge-ovis coreboot chromeos-bootimage built bootleg and verified test result by thermal team Change-Id: I30f54ae6017c54c91ff9b432bba0ebd5bfc65ab9 Signed-off-by: Tony Huang Reviewed-on: https://review.coreboot.org/c/coreboot/+/82614 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Sumeet R Pawnikar Reviewed-by: Eric Lai --- src/mainboard/google/rex/variants/deku/overridetree.cb | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src') diff --git a/src/mainboard/google/rex/variants/deku/overridetree.cb b/src/mainboard/google/rex/variants/deku/overridetree.cb index 5e3f250be9..8344e3ba55 100644 --- a/src/mainboard/google/rex/variants/deku/overridetree.cb +++ b/src/mainboard/google/rex/variants/deku/overridetree.cb @@ -27,6 +27,9 @@ chip soc/intel/meteorlake [DDI_PORT_4] = DDI_ENABLE_HPD, }" + # Temporary setting TCC of 105C = Tj max (110) - TCC_Offset (5) + register "tcc_offset" = "5" + register "serial_io_i2c_mode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoDisabled, [PchSerialIoIndexI2C1] = PchSerialIoDisabled, -- cgit v1.2.3