From 91df11242dad406d5fe7822e78e0a76a5b8da8b1 Mon Sep 17 00:00:00 2001 From: Ronak Kanabar Date: Thu, 9 Sep 2021 17:50:39 +0530 Subject: vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2347_00 The headers added are generated as per FSP v2347_00. Previous FSP version was v2265_01. Changes include: - UserBd UPD description update in FspmUpd.h BUG=b:199359579 BRANCH=None TEST=Build and boot brya Change-Id: I5e4dd58e5fb1a744b035a4de96986053a02610d3 Signed-off-by: Ronak Kanabar Reviewed-on: https://review.coreboot.org/c/coreboot/+/57521 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/vendorcode') diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h index 1f55fda5ac..4ab722cb84 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h @@ -455,9 +455,9 @@ typedef struct { /** Offset 0x01D0 - Board Type MrcBoardType, Options are 0=Mobile/Mobile Halo, 1=Desktop/DT Halo, 2=Desktop 2DPC - DDR5, 5=ULT/ULX/Mobile Halo, 7=UP Server - 0:Mobile/Mobile Halo, 1:Desktop/DT Halo, 2:Desktop 2DPC DDR5, 5:ULT/ULX/Mobile Halo, - 7:UP Server + DDR5, 5=ULT/ULX/Mobile Halo Type3, 6=ULT/ULX/Mobile Halo Type4, 8=UP Server + 0:Mobile/Mobile Halo, 1:Desktop/DT Halo, 2:Desktop 2DPC DDR5, 5:ULT/ULX/Mobile Halo + Type3, 6:ULT/ULX/Mobile Halo Type4, 8:UP Server **/ UINT8 UserBd; -- cgit v1.2.3