From 5de5522685c260e9643bad14faa22d417e3fc662 Mon Sep 17 00:00:00 2001
From: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Date: Wed, 14 Jan 2015 00:41:44 +1100
Subject: vendorcode/amd/agesa: Fix tautological compare

An unsigned enum expression is always strictly positive;
Comparison with '>= 0' is a tautology, hence remove it.

Change-Id: I910d672f8a27d278c2a2fe1e4f39fc61f2c5dbc5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: https://review.coreboot.org/8207
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
---
 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c      | 2 +-
 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c        | 2 +-
 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c        | 2 +-
 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c        | 2 +-
 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c      | 2 +-
 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c        | 2 +-
 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c        | 2 +-
 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c        | 2 +-
 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c        | 2 +-
 src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c      | 2 +-
 src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c        | 2 +-
 src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c        | 2 +-
 src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c        | 2 +-
 src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c | 2 +-
 src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c      | 2 +-
 src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c        | 2 +-
 src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c        | 2 +-
 src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c        | 2 +-
 src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c        | 2 +-
 src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c      | 2 +-
 src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c      | 2 +-
 21 files changed, 21 insertions(+), 21 deletions(-)

(limited to 'src/vendorcode')

diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c
index 6469da7cd7..a5d557d1b6 100644
--- a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c
+++ b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c
@@ -169,7 +169,7 @@ MemNCmnGetSetFieldC32 (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c
index 2ae2b87846..dfd56347f4 100644
--- a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c
+++ b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c
@@ -153,7 +153,7 @@ MemNCmnGetSetFieldDA (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c
index c2fe73ccaa..55658f77fe 100644
--- a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c
+++ b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c
@@ -156,7 +156,7 @@ MemNCmnGetSetFieldDr (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c
index dba28799c0..7fd781d0bc 100644
--- a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c
+++ b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c
@@ -169,7 +169,7 @@ MemNCmnGetSetFieldHy (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c
index a7c833b124..b4335d646f 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c
@@ -172,7 +172,7 @@ MemNCmnGetSetFieldC32 (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c
index 51cbac71c1..7d5b684ada 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c
@@ -157,7 +157,7 @@ MemNCmnGetSetFieldDA (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c
index a651d0c6f0..b84006b7ef 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c
@@ -158,7 +158,7 @@ MemNCmnGetSetFieldDr (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c
index 04b6912215..8f59d4d79f 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c
@@ -173,7 +173,7 @@ MemNCmnGetSetFieldHy (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
index 9c52705725..ff6e673502 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
@@ -159,7 +159,7 @@ MemNCmnGetSetFieldLN (
   if (FieldName == BFDctAccessDone) {
     // Llano does not support DctAccessDone. Assume DctAccessDone=1 always.
     Value = 1;
-  } else if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  } else if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c
index c2d0e785cf..c7b6dcf892 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnregc32.c
@@ -174,7 +174,7 @@ MemNCmnGetSetFieldC32 (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c
index e173bd734d..22dcee3a59 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnregda.c
@@ -159,7 +159,7 @@ MemNCmnGetSetFieldDA (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c
index 3983083e29..b549cbae6c 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DR/mnregdr.c
@@ -160,7 +160,7 @@ MemNCmnGetSetFieldDr (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c
index b8ceff3e33..a8a11706bc 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/HY/mnreghy.c
@@ -175,7 +175,7 @@ MemNCmnGetSetFieldHy (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c b/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c
index cc4cca68d9..7915b848bf 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/NB/ON/mrnon.c
@@ -293,7 +293,7 @@ MemRecNCmnGetSetFieldON (
   UINT8  Instance;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c
index 90baa82c00..17c603ff52 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/C32/mnregc32.c
@@ -173,7 +173,7 @@ MemNCmnGetSetFieldC32 (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c
index ab7a51ad45..336fb35eb0 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DA/mnregda.c
@@ -158,7 +158,7 @@ MemNCmnGetSetFieldDA (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c
index 61bd44b8e8..5c6207d72d 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/DR/mnregdr.c
@@ -159,7 +159,7 @@ MemNCmnGetSetFieldDr (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c
index 3b8eda1654..90bb9e46f5 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/HY/mnreghy.c
@@ -174,7 +174,7 @@ MemNCmnGetSetFieldHy (
   UINT32 Mask;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c
index 7ba37f6e26..512ef14475 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/Mem/NB/OR/mnregor.c
@@ -182,7 +182,7 @@ MemNCmnGetSetFieldOr (
   UINT8  Instance;
 
   Value = 0;
-  if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c
index 05b13aaf1b..ca2afb4979 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c
@@ -170,7 +170,7 @@ MemNCmnGetSetFieldTN (
   if (FieldName == BFDctAccessDone) {
     // No need to poll DctAccessDone for TN due to enhancement in phy
     Value = 1;
-  } else if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  } else if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c
index 724af40213..df810d0df1 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnregkb.c
@@ -169,7 +169,7 @@ MemNCmnGetSetFieldKB (
   if (FieldName == BFDctAccessDone) {
     // No need to poll DctAccessDone for KB due to enhancement in phy
     Value = 1;
-  } else if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+  } else if (FieldName < BFEndOfList) {
     Address = NBPtr->NBRegTable[FieldName];
     if (Address) {
       Lowbit = TSEFO_END (Address);
-- 
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