From 4f1786dcacbcb09bd09638616e8aa1b60125d626 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Thu, 18 Jan 2024 10:41:47 -0700 Subject: vendorcode: Rename Makefiles from .inc to .mk MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .inc suffix is confusing to various tools as it's not specific to Makefiles. This means that editors don't recognize the files, and don't open them with highlighting and any other specific editor functionality. This issue is also seen in the release notes generation script where Makefiles get renamed before running cloc. Signed-off-by: Martin Roth Change-Id: I80559b7c86a8fd2583cb0335279f676e0aa0209e Reviewed-on: https://review.coreboot.org/c/coreboot/+/80067 Reviewed-by: Maximilian Brune Tested-by: build bot (Jenkins) Reviewed-by: Felix Singer Reviewed-by: Michael Niewöhner Reviewed-by: Erik van den Bogaert --- src/vendorcode/Makefile.inc | 7 - src/vendorcode/Makefile.mk | 7 + src/vendorcode/amd/Makefile.inc | 5 - src/vendorcode/amd/Makefile.mk | 5 + src/vendorcode/amd/opensil/Makefile.inc | 93 ----------- src/vendorcode/amd/opensil/Makefile.mk | 93 +++++++++++ src/vendorcode/amd/opensil/genoa_poc/Makefile.inc | 19 --- src/vendorcode/amd/opensil/genoa_poc/Makefile.mk | 19 +++ .../amd/opensil/genoa_poc/mpio/Makefile.inc | 5 - .../amd/opensil/genoa_poc/mpio/Makefile.mk | 5 + src/vendorcode/amd/pi/00670F00/Makefile.inc | 156 ------------------ src/vendorcode/amd/pi/00670F00/Makefile.mk | 156 ++++++++++++++++++ src/vendorcode/amd/pi/Makefile.inc | 174 --------------------- src/vendorcode/amd/pi/Makefile.mk | 174 +++++++++++++++++++++ src/vendorcode/cavium/Makefile.inc | 79 ---------- src/vendorcode/cavium/Makefile.mk | 79 ++++++++++ src/vendorcode/eltan/Makefile.inc | 3 - src/vendorcode/eltan/Makefile.mk | 3 + src/vendorcode/eltan/security/Makefile.inc | 9 -- src/vendorcode/eltan/security/Makefile.mk | 9 ++ src/vendorcode/eltan/security/mboot/Makefile.inc | 12 -- src/vendorcode/eltan/security/mboot/Makefile.mk | 12 ++ .../eltan/security/verified_boot/Makefile.inc | 35 ----- .../eltan/security/verified_boot/Makefile.mk | 35 +++++ src/vendorcode/google/Makefile.inc | 6 - src/vendorcode/google/Makefile.mk | 6 + src/vendorcode/google/chromeos/Makefile.inc | 34 ---- src/vendorcode/google/chromeos/Makefile.mk | 34 ++++ src/vendorcode/intel/Makefile.inc | 30 ---- src/vendorcode/intel/Makefile.mk | 30 ++++ src/vendorcode/mediatek/Makefile.inc | 2 - src/vendorcode/mediatek/Makefile.mk | 2 + src/vendorcode/mediatek/mt8192/Makefile.inc | 5 - src/vendorcode/mediatek/mt8192/Makefile.mk | 5 + src/vendorcode/mediatek/mt8192/dramc/Makefile.inc | 21 --- src/vendorcode/mediatek/mt8192/dramc/Makefile.mk | 21 +++ src/vendorcode/mediatek/mt8195/Makefile.inc | 6 - src/vendorcode/mediatek/mt8195/Makefile.mk | 6 + src/vendorcode/mediatek/mt8195/dramc/Makefile.inc | 22 --- src/vendorcode/mediatek/mt8195/dramc/Makefile.mk | 22 +++ src/vendorcode/siemens/Makefile.inc | 3 - src/vendorcode/siemens/Makefile.mk | 3 + src/vendorcode/siemens/hwilib/Makefile.inc | 6 - src/vendorcode/siemens/hwilib/Makefile.mk | 6 + 44 files changed, 732 insertions(+), 732 deletions(-) delete mode 100644 src/vendorcode/Makefile.inc create mode 100644 src/vendorcode/Makefile.mk delete mode 100644 src/vendorcode/amd/Makefile.inc create mode 100644 src/vendorcode/amd/Makefile.mk delete mode 100644 src/vendorcode/amd/opensil/Makefile.inc create mode 100644 src/vendorcode/amd/opensil/Makefile.mk delete mode 100644 src/vendorcode/amd/opensil/genoa_poc/Makefile.inc create mode 100644 src/vendorcode/amd/opensil/genoa_poc/Makefile.mk delete mode 100644 src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.inc create mode 100644 src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.mk delete mode 100644 src/vendorcode/amd/pi/00670F00/Makefile.inc create mode 100644 src/vendorcode/amd/pi/00670F00/Makefile.mk delete mode 100644 src/vendorcode/amd/pi/Makefile.inc create mode 100644 src/vendorcode/amd/pi/Makefile.mk delete mode 100644 src/vendorcode/cavium/Makefile.inc create mode 100644 src/vendorcode/cavium/Makefile.mk delete mode 100644 src/vendorcode/eltan/Makefile.inc create mode 100644 src/vendorcode/eltan/Makefile.mk delete mode 100644 src/vendorcode/eltan/security/Makefile.inc create mode 100644 src/vendorcode/eltan/security/Makefile.mk delete mode 100644 src/vendorcode/eltan/security/mboot/Makefile.inc create mode 100644 src/vendorcode/eltan/security/mboot/Makefile.mk delete mode 100644 src/vendorcode/eltan/security/verified_boot/Makefile.inc create mode 100644 src/vendorcode/eltan/security/verified_boot/Makefile.mk delete mode 100644 src/vendorcode/google/Makefile.inc create mode 100644 src/vendorcode/google/Makefile.mk delete mode 100644 src/vendorcode/google/chromeos/Makefile.inc create mode 100644 src/vendorcode/google/chromeos/Makefile.mk delete mode 100644 src/vendorcode/intel/Makefile.inc create mode 100644 src/vendorcode/intel/Makefile.mk delete mode 100644 src/vendorcode/mediatek/Makefile.inc create mode 100644 src/vendorcode/mediatek/Makefile.mk delete mode 100644 src/vendorcode/mediatek/mt8192/Makefile.inc create mode 100644 src/vendorcode/mediatek/mt8192/Makefile.mk delete mode 100644 src/vendorcode/mediatek/mt8192/dramc/Makefile.inc create mode 100644 src/vendorcode/mediatek/mt8192/dramc/Makefile.mk delete mode 100644 src/vendorcode/mediatek/mt8195/Makefile.inc create mode 100644 src/vendorcode/mediatek/mt8195/Makefile.mk delete mode 100644 src/vendorcode/mediatek/mt8195/dramc/Makefile.inc create mode 100644 src/vendorcode/mediatek/mt8195/dramc/Makefile.mk delete mode 100644 src/vendorcode/siemens/Makefile.inc create mode 100644 src/vendorcode/siemens/Makefile.mk delete mode 100644 src/vendorcode/siemens/hwilib/Makefile.inc create mode 100644 src/vendorcode/siemens/hwilib/Makefile.mk (limited to 'src/vendorcode') diff --git a/src/vendorcode/Makefile.inc b/src/vendorcode/Makefile.inc deleted file mode 100644 index 36a13bb6f6..0000000000 --- a/src/vendorcode/Makefile.inc +++ /dev/null @@ -1,7 +0,0 @@ -subdirs-y += amd -subdirs-y += google -subdirs-y += intel -subdirs-y += siemens -subdirs-y += cavium -subdirs-y += eltan -subdirs-y += mediatek diff --git a/src/vendorcode/Makefile.mk b/src/vendorcode/Makefile.mk new file mode 100644 index 0000000000..36a13bb6f6 --- /dev/null +++ b/src/vendorcode/Makefile.mk @@ -0,0 +1,7 @@ +subdirs-y += amd +subdirs-y += google +subdirs-y += intel +subdirs-y += siemens +subdirs-y += cavium +subdirs-y += eltan +subdirs-y += mediatek diff --git a/src/vendorcode/amd/Makefile.inc b/src/vendorcode/amd/Makefile.inc deleted file mode 100644 index bc66a8d8b2..0000000000 --- a/src/vendorcode/amd/Makefile.inc +++ /dev/null @@ -1,5 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -subdirs-$(CONFIG_SOC_AMD_STONEYRIDGE) += pi -subdirs-$(CONFIG_CPU_AMD_PI_00730F01) += pi -subdirs-$(CONFIG_SOC_AMD_OPENSIL) += opensil diff --git a/src/vendorcode/amd/Makefile.mk b/src/vendorcode/amd/Makefile.mk new file mode 100644 index 0000000000..bc66a8d8b2 --- /dev/null +++ b/src/vendorcode/amd/Makefile.mk @@ -0,0 +1,5 @@ +## SPDX-License-Identifier: GPL-2.0-only + +subdirs-$(CONFIG_SOC_AMD_STONEYRIDGE) += pi +subdirs-$(CONFIG_CPU_AMD_PI_00730F01) += pi +subdirs-$(CONFIG_SOC_AMD_OPENSIL) += opensil diff --git a/src/vendorcode/amd/opensil/Makefile.inc b/src/vendorcode/amd/opensil/Makefile.inc deleted file mode 100644 index a97bf63e7c..0000000000 --- a/src/vendorcode/amd/opensil/Makefile.inc +++ /dev/null @@ -1,93 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_AMD_OPENSIL),y) - -ifneq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y) - $(error OpenSIL can only be built for either x86 or x86_64) -endif - -opensil_dir := $(call strip_quotes,$(CONFIG_AMD_OPENSIL_PATH)) - -subdirs-$(CONFIG_SOC_AMD_OPENSIL_GENOA_POC) += genoa_poc - -ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) -cpu_family_string="x86" -cpu_string="i686" -opensil_target_name=AMDopensil32 -is_32bit="true" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) -clang_args=\'-m32\'\, \'-fno-pic\'\, -endif -endif - -ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_64),y) -cpu_family_string="x86_64" -cpu_string="x86_64" -opensil_target_name=AMDopensil64 -is_32bit="false" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) -clang_args=\'-fno-pic\'\, -endif -endif - -ifeq ($(CONFIG_OPENSIL_DEBUG_OUTPUT),y) -sil_debug_enable="true" -else -sil_debug_enable="false" -endif - -# check if $(obj) is an absolute or a relative path -ifeq ($(shell printf %.1s "$(obj)"),/) -OBJPATH = $(obj) -else -OBJPATH = $(top)/$(obj) -endif - -PYTHON?=python - -OPENSIL_CONFIG=opensil_config - -bios_base=$(shell printf "%x" $(call int-subtract, $(CONFIG_ROMSTAGE_ADDR) $(CONFIG_C_ENV_BOOTBLOCK_SIZE))) -bios_size=$(CONFIG_C_ENV_BOOTBLOCK_SIZE) - -$(OBJPATH)/$(OPENSIL_CONFIG): $(opensil_dir)/../opensil_config.template - sed -e "s,##APOB_BASE##,$(CONFIG_PSP_APOB_DRAM_ADDRESS)," \ - -e "s,##BIOS_ENTRY_BASE##,$(bios_base)," \ - -e "s,##BIOS_ENTRY_SIZE##,$(bios_size) ," \ - $< > $@ - -$(OBJPATH)/$(OPENSIL_CONFIG).h: $(OBJPATH)/$(OPENSIL_CONFIG) $(obj)/config.h $(objutil)/kconfig/conf - cd $(opensil_dir); KCONFIG_CONFIG=$(OBJPATH)/$(OPENSIL_CONFIG) KCONFIG_AUTOHEADER=$@ $(PYTHON) util/kconfig/lib/genconfig.py Kconfig - -# meson handles ccache on its own -OPENSIL_COMPILER=$(filter-out $(CCACHE), $(CC_ramstage)) - -$(OBJPATH)/meson_crosscompile: $(opensil_dir)/../meson_cross.template $(obj)/config.h $(OBJPATH)/$(OPENSIL_CONFIG).h - sed -e "s,##COMPILER##,$(OPENSIL_COMPILER)," \ - -e "s,##AR##,$(AR_ramstage)," \ - -e "s,##NASM##,$(NASM)," \ - -e "s,##COREBOOT_DIR##,$(top)," \ - -e "s,##OPENSIL_DIR##,$(opensil_dir)," \ - -e "s,##OBJPATH##,$(OBJPATH)," \ - -e "s,##CPU_FAMILY##,$(cpu_family_string)," \ - -e "s,##CPU##,$(cpu_string)," \ - -e "s,##IS32BIT##,$(is_32bit)," \ - -e "s,##SIL_DEBUG_ENABLE##,$(sil_debug_enable)," \ - -e "s,##CLANG_ARGS##,$(clang_args)," \ - $< > $@ - -# Don't set a meson buildtype as opensil is broken when compiler optimizations are enabled -$(OBJPATH)/opensil: $(OBJPATH)/meson_crosscompile $(obj)/config.h - cd $(opensil_dir); meson setup --cross-file $< $(OBJPATH)/opensil -Db_staticpic=false \ - -DPlatKcfgDir=$(OBJPATH) -DPlatKcfg=$(OPENSIL_CONFIG) - -$(OBJPATH)/opensil/lib$(opensil_target_name).a: $(OBJPATH)/opensil - meson compile -C $(OBJPATH)/opensil $(opensil_target_name) - -$(OBJPATH)/opensil.a: $(OBJPATH)/opensil/lib$(opensil_target_name).a - cp $(OBJPATH)/opensil/lib$(opensil_target_name).a $@ - -romstage-libs += $(OBJPATH)/opensil.a -ramstage-libs += $(OBJPATH)/opensil.a - -endif diff --git a/src/vendorcode/amd/opensil/Makefile.mk b/src/vendorcode/amd/opensil/Makefile.mk new file mode 100644 index 0000000000..a97bf63e7c --- /dev/null +++ b/src/vendorcode/amd/opensil/Makefile.mk @@ -0,0 +1,93 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_AMD_OPENSIL),y) + +ifneq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y) + $(error OpenSIL can only be built for either x86 or x86_64) +endif + +opensil_dir := $(call strip_quotes,$(CONFIG_AMD_OPENSIL_PATH)) + +subdirs-$(CONFIG_SOC_AMD_OPENSIL_GENOA_POC) += genoa_poc + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) +cpu_family_string="x86" +cpu_string="i686" +opensil_target_name=AMDopensil32 +is_32bit="true" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) +clang_args=\'-m32\'\, \'-fno-pic\'\, +endif +endif + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_64),y) +cpu_family_string="x86_64" +cpu_string="x86_64" +opensil_target_name=AMDopensil64 +is_32bit="false" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) +clang_args=\'-fno-pic\'\, +endif +endif + +ifeq ($(CONFIG_OPENSIL_DEBUG_OUTPUT),y) +sil_debug_enable="true" +else +sil_debug_enable="false" +endif + +# check if $(obj) is an absolute or a relative path +ifeq ($(shell printf %.1s "$(obj)"),/) +OBJPATH = $(obj) +else +OBJPATH = $(top)/$(obj) +endif + +PYTHON?=python + +OPENSIL_CONFIG=opensil_config + +bios_base=$(shell printf "%x" $(call int-subtract, $(CONFIG_ROMSTAGE_ADDR) $(CONFIG_C_ENV_BOOTBLOCK_SIZE))) +bios_size=$(CONFIG_C_ENV_BOOTBLOCK_SIZE) + +$(OBJPATH)/$(OPENSIL_CONFIG): $(opensil_dir)/../opensil_config.template + sed -e "s,##APOB_BASE##,$(CONFIG_PSP_APOB_DRAM_ADDRESS)," \ + -e "s,##BIOS_ENTRY_BASE##,$(bios_base)," \ + -e "s,##BIOS_ENTRY_SIZE##,$(bios_size) ," \ + $< > $@ + +$(OBJPATH)/$(OPENSIL_CONFIG).h: $(OBJPATH)/$(OPENSIL_CONFIG) $(obj)/config.h $(objutil)/kconfig/conf + cd $(opensil_dir); KCONFIG_CONFIG=$(OBJPATH)/$(OPENSIL_CONFIG) KCONFIG_AUTOHEADER=$@ $(PYTHON) util/kconfig/lib/genconfig.py Kconfig + +# meson handles ccache on its own +OPENSIL_COMPILER=$(filter-out $(CCACHE), $(CC_ramstage)) + +$(OBJPATH)/meson_crosscompile: $(opensil_dir)/../meson_cross.template $(obj)/config.h $(OBJPATH)/$(OPENSIL_CONFIG).h + sed -e "s,##COMPILER##,$(OPENSIL_COMPILER)," \ + -e "s,##AR##,$(AR_ramstage)," \ + -e "s,##NASM##,$(NASM)," \ + -e "s,##COREBOOT_DIR##,$(top)," \ + -e "s,##OPENSIL_DIR##,$(opensil_dir)," \ + -e "s,##OBJPATH##,$(OBJPATH)," \ + -e "s,##CPU_FAMILY##,$(cpu_family_string)," \ + -e "s,##CPU##,$(cpu_string)," \ + -e "s,##IS32BIT##,$(is_32bit)," \ + -e "s,##SIL_DEBUG_ENABLE##,$(sil_debug_enable)," \ + -e "s,##CLANG_ARGS##,$(clang_args)," \ + $< > $@ + +# Don't set a meson buildtype as opensil is broken when compiler optimizations are enabled +$(OBJPATH)/opensil: $(OBJPATH)/meson_crosscompile $(obj)/config.h + cd $(opensil_dir); meson setup --cross-file $< $(OBJPATH)/opensil -Db_staticpic=false \ + -DPlatKcfgDir=$(OBJPATH) -DPlatKcfg=$(OPENSIL_CONFIG) + +$(OBJPATH)/opensil/lib$(opensil_target_name).a: $(OBJPATH)/opensil + meson compile -C $(OBJPATH)/opensil $(opensil_target_name) + +$(OBJPATH)/opensil.a: $(OBJPATH)/opensil/lib$(opensil_target_name).a + cp $(OBJPATH)/opensil/lib$(opensil_target_name).a $@ + +romstage-libs += $(OBJPATH)/opensil.a +ramstage-libs += $(OBJPATH)/opensil.a + +endif diff --git a/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc b/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc deleted file mode 100644 index 70bf44b32d..0000000000 --- a/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc +++ /dev/null @@ -1,19 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -subdirs-y += mpio - -CPPFLAGS_ramstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xUSL/FCH -I$(opensil_dir)/xUSL/FCH/Common -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF -CPPFLAGS_romstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF - -romstage-y += opensil_console.c -romstage-y += romstage.c - -ramstage-y += acpi.c -ramstage-y += memmap.c -ramstage-y += opensil_console.c -ramstage-y += ramstage.c - -$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/opensil_console.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas -$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/romstage.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas - -$(obj)/ramstage/vendorcode/amd/opensil/genoa_poc/opensil_console.o: CFLAGS_ramstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas diff --git a/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk b/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk new file mode 100644 index 0000000000..70bf44b32d --- /dev/null +++ b/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk @@ -0,0 +1,19 @@ +## SPDX-License-Identifier: GPL-2.0-only + +subdirs-y += mpio + +CPPFLAGS_ramstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xUSL/FCH -I$(opensil_dir)/xUSL/FCH/Common -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF +CPPFLAGS_romstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF + +romstage-y += opensil_console.c +romstage-y += romstage.c + +ramstage-y += acpi.c +ramstage-y += memmap.c +ramstage-y += opensil_console.c +ramstage-y += ramstage.c + +$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/opensil_console.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas +$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/romstage.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas + +$(obj)/ramstage/vendorcode/amd/opensil/genoa_poc/opensil_console.o: CFLAGS_ramstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas diff --git a/src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.inc b/src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.inc deleted file mode 100644 index f3ae3ef614..0000000000 --- a/src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.inc +++ /dev/null @@ -1,5 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ramstage-y += chip.c - -$(obj)/ramstage/vendorcode/amd/opensil/genoa_poc/mpio/chip.o: CFLAGS_ramstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas diff --git a/src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.mk b/src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.mk new file mode 100644 index 0000000000..f3ae3ef614 --- /dev/null +++ b/src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.mk @@ -0,0 +1,5 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ramstage-y += chip.c + +$(obj)/ramstage/vendorcode/amd/opensil/genoa_poc/mpio/chip.o: CFLAGS_ramstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas diff --git a/src/vendorcode/amd/pi/00670F00/Makefile.inc b/src/vendorcode/amd/pi/00670F00/Makefile.inc deleted file mode 100644 index 330bfd7631..0000000000 --- a/src/vendorcode/amd/pi/00670F00/Makefile.inc +++ /dev/null @@ -1,156 +0,0 @@ -## SPDX-License-Identifier: BSD-3-Clause - -#***************************************************************************** -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# * Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# * Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# * Neither the name of Advanced Micro Devices, Inc. nor the names of -# its contributors may be used to endorse or promote products derived -# from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY -# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -#***************************************************************************** - -ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y) - -AGESA_CFLAGS += -march=amdfam10 -fno-strict-aliasing -D__LIBAGESA__ - -CC_bootblock := $(CC_bootblock) $(BINARY_PI_INC) -CC_romstage := $(CC_romstage) $(BINARY_PI_INC) -CC_postcar:= $(CC_postcar) -I$(AGESA_ROOT)/binaryPI -CC_ramstage := $(CC_ramstage) $(BINARY_PI_INC) - -####################################################################### - -define create_agesa_cp_template -# $1 AGESA source file - -$(agesa_src_path)/$(notdir $1): $1 - @printf " AGESA Copying $$(notdir $1) => $$(@D)\n" - if [ ! -r $(agesa_src_path)/$(notdir $1) ]; then \ - cp -f $1 $$(@D); \ - fi - -$(call src-to-obj,libagesa,$1): $(agesa_src_path)/$(notdir $1) $(obj)/config.h $(src)/include/kconfig.h - @printf " CC $$(subst $(obj)/,,$$(@))\n" - $(CC_libagesa) -c -MMD $(CFLAGS_libagesa) $(AGESA_CFLAGS) \ - $(AGESA_INC) \ - -include $(src)/include/kconfig.h \ - -include $(src)/include/rules.h \ - -include $(src)/commonlib/bsd/include/commonlib/bsd/compiler.h \ - -o $$@ \ - $(agesa_src_path)/$(notdir $1) - -endef - -agesa_raw_files += $(wildcard $(AGESA_ROOT)/Lib/*.[cS]) - -agesa_raw_files += $(wildcard $(AGESA_ROOT)/binaryPI/*.[cS]) - -classes-y += libagesa - -ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) -$(eval $(call create_class_compiler,libagesa,x86_32)) -else -$(eval $(call create_class_compiler,libagesa,x86_64)) -endif - -agesa_src_files := $(strip $(sort $(foreach file,$(strip $(agesa_raw_files)),$(call strip_quotes,$(file))))) -agesa_output_path := $(obj)/libagesa -agesa_src_path := $(agesa_output_path) -agesa_dirs := $(sort $(abspath $(dir $(call src-to-obj,libagesa,$(agesa_src_files))))) - -additional-dirs += $(agesa_src_path) $(agesa_dirs) - -$(foreach file,$(strip $(agesa_src_files)),$(eval $(call create_agesa_cp_template,$(file)))) - -$(agesa_output_path)/libagesa.a: $(call src-to-obj,libagesa,$(agesa_src_files)) - @printf " AGESA $(subst $(obj)/,,$(@))\n" - $(AR_libagesa) rcs $@ $+ - -bootblock-libs += $(agesa_output_path)/libagesa.a -romstage-libs += $(agesa_output_path)/libagesa.a -ramstage-libs += $(agesa_output_path)/libagesa.a - -####################################################################### - -warn_no_agesa: - printf "\n\t** WARNING **\n" - printf "coreboot has been built with no AGESA support. Successfully " - printf "booting this image will be impossible.\n\n" - -PHONY+=warn_no_agesa - -ifeq ($(CONFIG_AGESA_SPLIT_MEMORY_FILES), y) - -# convert input elf to rmodule -AGESA_POST_MEM_INPUT_ELF = $(call strip_quotes,$(CONFIG_AGESA_POST_MEMORY_BINARY_PI_FILE)) - -# If no post-mem file then also skip pre-mem file -ifeq ($(AGESA_POST_MEM_INPUT_ELF),) -show_notices:: warn_no_agesa -else -AGESA_POST_MEM_ELF = $(objcbfs)/$(patsubst %.elf,%.debug,$(notdir $(AGESA_POST_MEM_INPUT_ELF))) -AGESA_POST_MEM_ELF_RMOD = $(AGESA_POST_MEM_ELF).rmod - -$(AGESA_POST_MEM_ELF): $(AGESA_POST_MEM_INPUT_ELF) - cp $< $@ - -$(AGESA_POST_MEM_ELF_RMOD): $(AGESA_POST_MEM_ELF) - -cbfs-files-y += $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME) -$(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-file := $(CONFIG_AGESA_PRE_MEMORY_BINARY_PI_FILE) -$(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-type := stage -$(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-options := --xip -# 4KiB alignment to handle any interior alignment. Current AGESA only has -# 64 byte alignment. -$(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-align := 4096 - -cbfs-files-y += $(CONFIG_AGESA_POST_MEMORY_CBFS_NAME) -$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-file := $(AGESA_POST_MEM_ELF_RMOD) -$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-type := stage -$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-compression := $(CBFS_COMPRESS_FLAG) - -endif # AGESA_POST_MEM_INPUT_ELF == "" - -else # CONFIG_AGESA_SPLIT_MEMORY_FILES - -AGESA_BINARYPI_INPUT_FILE = $(call strip_quotes,$(CONFIG_AGESA_BINARY_PI_FILE)) -ifeq ($(AGESA_BINARYPI_INPUT_FILE),) -show_notices:: warn_no_agesa -else - -cbfs-files-y += $(CONFIG_AGESA_CBFS_NAME) -$(CONFIG_AGESA_CBFS_NAME)-file := $(AGESA_BINARYPI_INPUT_FILE) - -ifeq ($(CONFIG_AGESA_BINARY_PI_AS_STAGE),y) -$(CONFIG_AGESA_CBFS_NAME)-type := stage -$(CONFIG_AGESA_CBFS_NAME)-options := --xip -# 4KiB alignment to handle any interior alignment. Current AGESA only has -# 64 byte alignment. -$(CONFIG_AGESA_CBFS_NAME)-align := 4096 -else -$(CONFIG_AGESA_CBFS_NAME)-type := raw -$(CONFIG_AGESA_CBFS_NAME)-position := $(CONFIG_AGESA_BINARY_PI_LOCATION) -regions-for-file-$(CONFIG_AGESA_CBFS_NAME) = COREBOOT -endif # CONFIG_AGESA_BINARY_PI_AS_STAGE - -endif # AGESA_BINARYPI_INPUT_FILE == "" -endif # CONFIG_AGESA_SPLIT_MEMORY_FILES - -endif diff --git a/src/vendorcode/amd/pi/00670F00/Makefile.mk b/src/vendorcode/amd/pi/00670F00/Makefile.mk new file mode 100644 index 0000000000..330bfd7631 --- /dev/null +++ b/src/vendorcode/amd/pi/00670F00/Makefile.mk @@ -0,0 +1,156 @@ +## SPDX-License-Identifier: BSD-3-Clause + +#***************************************************************************** +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# * Neither the name of Advanced Micro Devices, Inc. nor the names of +# its contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#***************************************************************************** + +ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y) + +AGESA_CFLAGS += -march=amdfam10 -fno-strict-aliasing -D__LIBAGESA__ + +CC_bootblock := $(CC_bootblock) $(BINARY_PI_INC) +CC_romstage := $(CC_romstage) $(BINARY_PI_INC) +CC_postcar:= $(CC_postcar) -I$(AGESA_ROOT)/binaryPI +CC_ramstage := $(CC_ramstage) $(BINARY_PI_INC) + +####################################################################### + +define create_agesa_cp_template +# $1 AGESA source file + +$(agesa_src_path)/$(notdir $1): $1 + @printf " AGESA Copying $$(notdir $1) => $$(@D)\n" + if [ ! -r $(agesa_src_path)/$(notdir $1) ]; then \ + cp -f $1 $$(@D); \ + fi + +$(call src-to-obj,libagesa,$1): $(agesa_src_path)/$(notdir $1) $(obj)/config.h $(src)/include/kconfig.h + @printf " CC $$(subst $(obj)/,,$$(@))\n" + $(CC_libagesa) -c -MMD $(CFLAGS_libagesa) $(AGESA_CFLAGS) \ + $(AGESA_INC) \ + -include $(src)/include/kconfig.h \ + -include $(src)/include/rules.h \ + -include $(src)/commonlib/bsd/include/commonlib/bsd/compiler.h \ + -o $$@ \ + $(agesa_src_path)/$(notdir $1) + +endef + +agesa_raw_files += $(wildcard $(AGESA_ROOT)/Lib/*.[cS]) + +agesa_raw_files += $(wildcard $(AGESA_ROOT)/binaryPI/*.[cS]) + +classes-y += libagesa + +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) +$(eval $(call create_class_compiler,libagesa,x86_32)) +else +$(eval $(call create_class_compiler,libagesa,x86_64)) +endif + +agesa_src_files := $(strip $(sort $(foreach file,$(strip $(agesa_raw_files)),$(call strip_quotes,$(file))))) +agesa_output_path := $(obj)/libagesa +agesa_src_path := $(agesa_output_path) +agesa_dirs := $(sort $(abspath $(dir $(call src-to-obj,libagesa,$(agesa_src_files))))) + +additional-dirs += $(agesa_src_path) $(agesa_dirs) + +$(foreach file,$(strip $(agesa_src_files)),$(eval $(call create_agesa_cp_template,$(file)))) + +$(agesa_output_path)/libagesa.a: $(call src-to-obj,libagesa,$(agesa_src_files)) + @printf " AGESA $(subst $(obj)/,,$(@))\n" + $(AR_libagesa) rcs $@ $+ + +bootblock-libs += $(agesa_output_path)/libagesa.a +romstage-libs += $(agesa_output_path)/libagesa.a +ramstage-libs += $(agesa_output_path)/libagesa.a + +####################################################################### + +warn_no_agesa: + printf "\n\t** WARNING **\n" + printf "coreboot has been built with no AGESA support. Successfully " + printf "booting this image will be impossible.\n\n" + +PHONY+=warn_no_agesa + +ifeq ($(CONFIG_AGESA_SPLIT_MEMORY_FILES), y) + +# convert input elf to rmodule +AGESA_POST_MEM_INPUT_ELF = $(call strip_quotes,$(CONFIG_AGESA_POST_MEMORY_BINARY_PI_FILE)) + +# If no post-mem file then also skip pre-mem file +ifeq ($(AGESA_POST_MEM_INPUT_ELF),) +show_notices:: warn_no_agesa +else +AGESA_POST_MEM_ELF = $(objcbfs)/$(patsubst %.elf,%.debug,$(notdir $(AGESA_POST_MEM_INPUT_ELF))) +AGESA_POST_MEM_ELF_RMOD = $(AGESA_POST_MEM_ELF).rmod + +$(AGESA_POST_MEM_ELF): $(AGESA_POST_MEM_INPUT_ELF) + cp $< $@ + +$(AGESA_POST_MEM_ELF_RMOD): $(AGESA_POST_MEM_ELF) + +cbfs-files-y += $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME) +$(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-file := $(CONFIG_AGESA_PRE_MEMORY_BINARY_PI_FILE) +$(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-type := stage +$(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-options := --xip +# 4KiB alignment to handle any interior alignment. Current AGESA only has +# 64 byte alignment. +$(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-align := 4096 + +cbfs-files-y += $(CONFIG_AGESA_POST_MEMORY_CBFS_NAME) +$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-file := $(AGESA_POST_MEM_ELF_RMOD) +$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-type := stage +$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-compression := $(CBFS_COMPRESS_FLAG) + +endif # AGESA_POST_MEM_INPUT_ELF == "" + +else # CONFIG_AGESA_SPLIT_MEMORY_FILES + +AGESA_BINARYPI_INPUT_FILE = $(call strip_quotes,$(CONFIG_AGESA_BINARY_PI_FILE)) +ifeq ($(AGESA_BINARYPI_INPUT_FILE),) +show_notices:: warn_no_agesa +else + +cbfs-files-y += $(CONFIG_AGESA_CBFS_NAME) +$(CONFIG_AGESA_CBFS_NAME)-file := $(AGESA_BINARYPI_INPUT_FILE) + +ifeq ($(CONFIG_AGESA_BINARY_PI_AS_STAGE),y) +$(CONFIG_AGESA_CBFS_NAME)-type := stage +$(CONFIG_AGESA_CBFS_NAME)-options := --xip +# 4KiB alignment to handle any interior alignment. Current AGESA only has +# 64 byte alignment. +$(CONFIG_AGESA_CBFS_NAME)-align := 4096 +else +$(CONFIG_AGESA_CBFS_NAME)-type := raw +$(CONFIG_AGESA_CBFS_NAME)-position := $(CONFIG_AGESA_BINARY_PI_LOCATION) +regions-for-file-$(CONFIG_AGESA_CBFS_NAME) = COREBOOT +endif # CONFIG_AGESA_BINARY_PI_AS_STAGE + +endif # AGESA_BINARYPI_INPUT_FILE == "" +endif # CONFIG_AGESA_SPLIT_MEMORY_FILES + +endif diff --git a/src/vendorcode/amd/pi/Makefile.inc b/src/vendorcode/amd/pi/Makefile.inc deleted file mode 100644 index 5cd12545ae..0000000000 --- a/src/vendorcode/amd/pi/Makefile.inc +++ /dev/null @@ -1,174 +0,0 @@ -## SPDX-License-Identifier: BSD-3-Clause - -#***************************************************************************** -# -# Copyright (c) 2012, 2016 Advanced Micro Devices, Inc. -# 2013 - 2014, Sage Electronic Engineering, LLC -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# * Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# * Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# * Neither the name of Advanced Micro Devices, Inc. nor the names of -# its contributors may be used to endorse or promote products derived -# from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY -# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -#***************************************************************************** - -ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y) - -subdirs-y += 00670F00 - -# AGESA V5 Files - -AGESA_ROOT = $(top)/$(call strip_quotes,$(CONFIG_AGESA_BINARY_PI_VENDORCODE_PATH)) - -BINARY_PI_INC = -I$(AGESA_ROOT) -BINARY_PI_INC += -I$(AGESA_ROOT)/binaryPI -BINARY_PI_INC += -I$(AGESA_ROOT)/Include -BINARY_PI_INC += -I$(AGESA_ROOT)/Proc -BINARY_PI_INC += -I$(AGESA_ROOT)/Proc/Common -BINARY_PI_INC += -I$(AGESA_ROOT)/Proc/CPU -BINARY_PI_INC += -I$(AGESA_ROOT)/Proc/CPU/Family -BINARY_PI_INC += -I$(AGESA_ROOT)/Proc/Fch -BINARY_PI_INC += -I$(AGESA_ROOT)/Proc/Fch/Common - -AGESA_INC = -I$(obj) -AGESA_INC += $(BINARY_PI_INC) - -AGESA_INC += -I$(src)/soc/amd/stoneyridge/include -AGESA_INC += -I$(src)/soc/amd/common/block/include - -AGESA_INC += -I$(src)/arch/x86/include -AGESA_INC += -I$(src)/include -AGESA_INC += -I$(src)/commonlib/include -AGESA_INC += -I$(VBOOT_SOURCE)/firmware/include -endif - -ifeq ($(CONFIG_CPU_AMD_PI_00730F01),y) -# AGESA V5 Files - -subdirs-y += 00730F01 - -AGESA_ROOT = $(call strip_quotes,$(CONFIG_AGESA_BINARY_PI_VENDORCODE_PATH)) - -AGESA_INC = -I$(obj) -I$(src)/vendorcode/amd/include - -AGESA_INC += -I$(src)/mainboard/$(MAINBOARDDIR) -AGESA_INC += -I$(AGESA_ROOT)/binaryPI -AGESA_INC += -I$(AGESA_ROOT) -AGESA_INC += -I$(AGESA_ROOT)/Include -AGESA_INC += -I$(src)/vendorcode/amd/pi -AGESA_INC += -I$(src)/vendorcode/amd/pi/Lib - -AGESA_INC += -I$(AGESA_ROOT)/Proc -AGESA_INC += -I$(AGESA_ROOT)/Proc/Common -AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU -AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Family -AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Feature -AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch -AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch/Common - -AGESA_INC += -I$(src)/northbridge/amd/pi -AGESA_INC += -I$(src)/southbridge/amd/pi/hudson - -AGESA_INC += -I$(src)/arch/x86/include -AGESA_INC += -I$(src)/include -AGESA_INC += -I$(src)/commonlib/include -AGESA_INC += -I$(src)/commonlib/bsd/include -AGESA_INC += -I$(VBOOT_SOURCE)/firmware/include - -AGESA_CFLAGS += -Wno-pragma-pack -AGESA_CFLAGS += -fno-strict-aliasing -D__LIBAGESA__ -CFLAGS_x86_32 += $(AGESA_CFLAGS) -CFLAGS_x86_64 += $(AGESA_CFLAGS) - -export AGESA_ROOT := $(AGESA_ROOT) -export AGESA_INC := $(AGESA_INC) -export AGESA_CFLAGS := $(AGESA_CFLAGS) - -CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) -CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) -CC_postcar:= $(CC_postcar) -I$(src)/southbridge/amd/pi/hudson -I$(AGESA_ROOT)/binaryPI -CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) - -CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS) -CC_x86_64 := $(CC_x86_64) $(AGESA_INC) $(AGESA_CFLAGS) - -####################################################################### - -define create_agesa_cp_template -# $1 AGESA source file - -$(agesa_src_path)/$(notdir $1): $1 - @printf " AGESA Copying $$(notdir $1) => $$(@D)\n" - if [ ! -r $(agesa_src_path)/$(notdir $1) ]; then \ - cp -f $1 $$(@D); \ - fi - -$(call src-to-obj,libagesa,$1): $(agesa_src_path)/$(notdir $1) $(obj)/config.h $(src)/include/kconfig.h - @printf " CC $$(subst $(obj)/,,$$(@))\n" - $(CC_libagesa) -c -MMD $(CFLAGS_libagesa) $(AGESA_CFLAGS) \ - $(AGESA_INC) \ - -include $(src)/include/kconfig.h \ - -include $(src)/include/rules.h \ - -include $(src)/commonlib/bsd/include/commonlib/bsd/compiler.h \ - -o $$@ \ - $(agesa_src_path)/$(notdir $1) - -endef - -agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/Lib/*.[cS]) - -ifeq ($(CONFIG_HUDSON_IMC_FWM),y) -agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/Lib/imc/*.c) -endif - -classes-y += libagesa - -ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) -$(eval $(call create_class_compiler,libagesa,x86_32)) -else -$(eval $(call create_class_compiler,libagesa,x86_64)) -endif - -agesa_src_files := $(strip $(sort $(foreach file,$(strip $(agesa_raw_files)),$(call strip_quotes,$(file))))) -agesa_output_path := $(obj)/libagesa -agesa_src_path := $(agesa_output_path) -agesa_dirs := $(sort $(abspath $(dir $(call src-to-obj,libagesa,$(agesa_src_files))))) - -additional-dirs += $(agesa_src_path) $(agesa_dirs) - -$(foreach file,$(strip $(agesa_src_files)),$(eval $(call create_agesa_cp_template,$(file)))) - -$(agesa_output_path)/libagesa.a: $(call src-to-obj,libagesa,$(agesa_src_files)) - @printf " AGESA $(subst $(obj)/,,$(@))\n" - $(AR_libagesa) rcsDT $@ $+ - -bootblock-libs += $(agesa_output_path)/libagesa.a -romstage-libs += $(agesa_output_path)/libagesa.a -ramstage-libs += $(agesa_output_path)/libagesa.a - -####################################################################### - -cbfs-files-y += $(CONFIG_AGESA_CBFS_NAME) -$(CONFIG_AGESA_CBFS_NAME)-file := $(CONFIG_AGESA_BINARY_PI_FILE) -$(CONFIG_AGESA_CBFS_NAME)-type := raw -$(CONFIG_AGESA_CBFS_NAME)-position := $(CONFIG_AGESA_BINARY_PI_LOCATION) - -endif diff --git a/src/vendorcode/amd/pi/Makefile.mk b/src/vendorcode/amd/pi/Makefile.mk new file mode 100644 index 0000000000..5cd12545ae --- /dev/null +++ b/src/vendorcode/amd/pi/Makefile.mk @@ -0,0 +1,174 @@ +## SPDX-License-Identifier: BSD-3-Clause + +#***************************************************************************** +# +# Copyright (c) 2012, 2016 Advanced Micro Devices, Inc. +# 2013 - 2014, Sage Electronic Engineering, LLC +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# * Neither the name of Advanced Micro Devices, Inc. nor the names of +# its contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#***************************************************************************** + +ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y) + +subdirs-y += 00670F00 + +# AGESA V5 Files + +AGESA_ROOT = $(top)/$(call strip_quotes,$(CONFIG_AGESA_BINARY_PI_VENDORCODE_PATH)) + +BINARY_PI_INC = -I$(AGESA_ROOT) +BINARY_PI_INC += -I$(AGESA_ROOT)/binaryPI +BINARY_PI_INC += -I$(AGESA_ROOT)/Include +BINARY_PI_INC += -I$(AGESA_ROOT)/Proc +BINARY_PI_INC += -I$(AGESA_ROOT)/Proc/Common +BINARY_PI_INC += -I$(AGESA_ROOT)/Proc/CPU +BINARY_PI_INC += -I$(AGESA_ROOT)/Proc/CPU/Family +BINARY_PI_INC += -I$(AGESA_ROOT)/Proc/Fch +BINARY_PI_INC += -I$(AGESA_ROOT)/Proc/Fch/Common + +AGESA_INC = -I$(obj) +AGESA_INC += $(BINARY_PI_INC) + +AGESA_INC += -I$(src)/soc/amd/stoneyridge/include +AGESA_INC += -I$(src)/soc/amd/common/block/include + +AGESA_INC += -I$(src)/arch/x86/include +AGESA_INC += -I$(src)/include +AGESA_INC += -I$(src)/commonlib/include +AGESA_INC += -I$(VBOOT_SOURCE)/firmware/include +endif + +ifeq ($(CONFIG_CPU_AMD_PI_00730F01),y) +# AGESA V5 Files + +subdirs-y += 00730F01 + +AGESA_ROOT = $(call strip_quotes,$(CONFIG_AGESA_BINARY_PI_VENDORCODE_PATH)) + +AGESA_INC = -I$(obj) -I$(src)/vendorcode/amd/include + +AGESA_INC += -I$(src)/mainboard/$(MAINBOARDDIR) +AGESA_INC += -I$(AGESA_ROOT)/binaryPI +AGESA_INC += -I$(AGESA_ROOT) +AGESA_INC += -I$(AGESA_ROOT)/Include +AGESA_INC += -I$(src)/vendorcode/amd/pi +AGESA_INC += -I$(src)/vendorcode/amd/pi/Lib + +AGESA_INC += -I$(AGESA_ROOT)/Proc +AGESA_INC += -I$(AGESA_ROOT)/Proc/Common +AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU +AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Family +AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Feature +AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch +AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch/Common + +AGESA_INC += -I$(src)/northbridge/amd/pi +AGESA_INC += -I$(src)/southbridge/amd/pi/hudson + +AGESA_INC += -I$(src)/arch/x86/include +AGESA_INC += -I$(src)/include +AGESA_INC += -I$(src)/commonlib/include +AGESA_INC += -I$(src)/commonlib/bsd/include +AGESA_INC += -I$(VBOOT_SOURCE)/firmware/include + +AGESA_CFLAGS += -Wno-pragma-pack +AGESA_CFLAGS += -fno-strict-aliasing -D__LIBAGESA__ +CFLAGS_x86_32 += $(AGESA_CFLAGS) +CFLAGS_x86_64 += $(AGESA_CFLAGS) + +export AGESA_ROOT := $(AGESA_ROOT) +export AGESA_INC := $(AGESA_INC) +export AGESA_CFLAGS := $(AGESA_CFLAGS) + +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_postcar:= $(CC_postcar) -I$(src)/southbridge/amd/pi/hudson -I$(AGESA_ROOT)/binaryPI +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) + +CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS) +CC_x86_64 := $(CC_x86_64) $(AGESA_INC) $(AGESA_CFLAGS) + +####################################################################### + +define create_agesa_cp_template +# $1 AGESA source file + +$(agesa_src_path)/$(notdir $1): $1 + @printf " AGESA Copying $$(notdir $1) => $$(@D)\n" + if [ ! -r $(agesa_src_path)/$(notdir $1) ]; then \ + cp -f $1 $$(@D); \ + fi + +$(call src-to-obj,libagesa,$1): $(agesa_src_path)/$(notdir $1) $(obj)/config.h $(src)/include/kconfig.h + @printf " CC $$(subst $(obj)/,,$$(@))\n" + $(CC_libagesa) -c -MMD $(CFLAGS_libagesa) $(AGESA_CFLAGS) \ + $(AGESA_INC) \ + -include $(src)/include/kconfig.h \ + -include $(src)/include/rules.h \ + -include $(src)/commonlib/bsd/include/commonlib/bsd/compiler.h \ + -o $$@ \ + $(agesa_src_path)/$(notdir $1) + +endef + +agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/Lib/*.[cS]) + +ifeq ($(CONFIG_HUDSON_IMC_FWM),y) +agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/Lib/imc/*.c) +endif + +classes-y += libagesa + +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y) +$(eval $(call create_class_compiler,libagesa,x86_32)) +else +$(eval $(call create_class_compiler,libagesa,x86_64)) +endif + +agesa_src_files := $(strip $(sort $(foreach file,$(strip $(agesa_raw_files)),$(call strip_quotes,$(file))))) +agesa_output_path := $(obj)/libagesa +agesa_src_path := $(agesa_output_path) +agesa_dirs := $(sort $(abspath $(dir $(call src-to-obj,libagesa,$(agesa_src_files))))) + +additional-dirs += $(agesa_src_path) $(agesa_dirs) + +$(foreach file,$(strip $(agesa_src_files)),$(eval $(call create_agesa_cp_template,$(file)))) + +$(agesa_output_path)/libagesa.a: $(call src-to-obj,libagesa,$(agesa_src_files)) + @printf " AGESA $(subst $(obj)/,,$(@))\n" + $(AR_libagesa) rcsDT $@ $+ + +bootblock-libs += $(agesa_output_path)/libagesa.a +romstage-libs += $(agesa_output_path)/libagesa.a +ramstage-libs += $(agesa_output_path)/libagesa.a + +####################################################################### + +cbfs-files-y += $(CONFIG_AGESA_CBFS_NAME) +$(CONFIG_AGESA_CBFS_NAME)-file := $(CONFIG_AGESA_BINARY_PI_FILE) +$(CONFIG_AGESA_CBFS_NAME)-type := raw +$(CONFIG_AGESA_CBFS_NAME)-position := $(CONFIG_AGESA_BINARY_PI_LOCATION) + +endif diff --git a/src/vendorcode/cavium/Makefile.inc b/src/vendorcode/cavium/Makefile.inc deleted file mode 100644 index bf2fe0458d..0000000000 --- a/src/vendorcode/cavium/Makefile.inc +++ /dev/null @@ -1,79 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_CAVIUM_BDK),y) - -romstage-y += bdk/libbdk-arch/bdk-csr.c -romstage-y += bdk/libbdk-arch/bdk-model.c -romstage-y += bdk/libbdk-arch/bdk-numa.c -romstage-y += bdk/libbdk-boot/bdk-boot-status.c -romstage-y += bdk/libbdk-dram/bdk-dram-address.c -romstage-y += bdk/libbdk-dram/bdk-dram-config.c -romstage-y += bdk/libbdk-dram/bdk-dram-size.c -romstage-y += bdk/libbdk-dram/bdk-dram-test.c -romstage-y += bdk/libbdk-dram/bdk-dram-test-addrbus.c -romstage-y += bdk/libbdk-dram/bdk-dram-test-databus.c -romstage-y += bdk/libbdk-dram/bdk-dram-test-fastscan.c -romstage-y += bdk/libbdk-dram/bdk-dram-test-patfil.c -romstage-y += bdk/libbdk-driver/bdk-driver-rnm.c -romstage-y += bdk/libbdk-hal/bdk-clock.c -romstage-y += bdk/libbdk-hal/bdk-config.c -romstage-y += bdk/libbdk-hal/bdk-gpio.c -romstage-y += bdk/libbdk-hal/bdk-l2c.c -romstage-y += bdk/libbdk-os/bdk-init.c -romstage-y += bdk/libbdk-trust/bdk-trust.c -romstage-y += bdk/libdram/dram-env.c -romstage-y += bdk/libdram/dram-init-ddr3.c -romstage-y += bdk/libdram/dram-l2c.c -romstage-y += bdk/libdram/dram-spd.c -romstage-y += bdk/libdram/dram-tune-ddr3.c -romstage-y += bdk/libdram/lib_octeon_shared.c -romstage-y += bdk/libdram/libdram.c -romstage-y += bdk/libdram/libdram-config-load.c -romstage-y += bdk/libbdk-hal/bdk-access.c - -# FIXME: Get rid of lame_string.c -romstage-y += bdk/lame_string.c - -CPPFLAGS_common += -Isrc/vendorcode/cavium/include/bdk - -# For bdk_dram_get_size_mbytes() -ramstage-y += bdk/libbdk-dram/bdk-dram-size.c - -ramstage-y += bdk/libbdk-hal/bdk-config.c -ramstage-y += bdk/libbdk-hal/bdk-qlm.c -ramstage-y += bdk/libbdk-hal/bdk-pcie-cn8xxx.c -ramstage-y += bdk/libbdk-hal/bdk-pcie.c -ramstage-y += bdk/libbdk-hal/bdk-gpio.c -ramstage-y += bdk/libbdk-hal/bdk-ecam-io.c -ramstage-y += bdk/libbdk-hal/bdk-usb.c -ramstage-y += bdk/libbdk-hal/bdk-access.c - -ramstage-y += bdk/libbdk-arch/bdk-csr.c -ramstage-y += bdk/libbdk-arch/bdk-model.c -ramstage-y += bdk/libbdk-arch/bdk-numa.c -ramstage-y += bdk/libbdk-hal/qlm/bdk-qlm-common.c -ramstage-y += bdk/libbdk-hal/qlm/bdk-qlm-errata-cn8xxx.c -ramstage-y += bdk/libbdk-hal/qlm/bdk-qlm-common-sata.c -ramstage-y += bdk/libbdk-hal/qlm/bdk-qlm-margin-cn8xxx.c - -ramstage-y += bdk/libbdk-boot/bdk-boot-qlm.c -ramstage-y += bdk/libbdk-boot/bdk-boot-pcie.c -ramstage-y += bdk/libbdk-boot/bdk-boot-usb.c -ramstage-y += bdk/libbdk-boot/bdk-boot-gpio.c -ramstage-y += bdk/libbdk-boot/bdk-boot.c - -ramstage-y += bdk/libbdk-hal/if/bdk-if-phy.c -ramstage-y += bdk/libbdk-hal/if/bdk-if-phy-marvell.c -ramstage-y += bdk/libbdk-hal/if/bdk-if-phy-vetesse-8514.c -ramstage-y += bdk/libbdk-hal/if/bdk-if-phy-vetesse.c -ramstage-y += bdk/libbdk-driver/bdk-driver-mdio.c -ramstage-y += bdk/libbdk-driver/bdk-driver-rnm.c -ramstage-y += bdk/libbdk-hal/device/bdk-device.c -ramstage-y += bdk/libbdk-hal/bdk-ecam.c - -# FIXME: Get rid of lame_string.c -ramstage-y += bdk/lame_string.c - -ramstage-$(CONFIG_SOC_CAVIUM_CN81XX) += bdk/libbdk-hal/qlm/bdk-qlm-cn81xx.c - -endif diff --git a/src/vendorcode/cavium/Makefile.mk b/src/vendorcode/cavium/Makefile.mk new file mode 100644 index 0000000000..bf2fe0458d --- /dev/null +++ b/src/vendorcode/cavium/Makefile.mk @@ -0,0 +1,79 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_CAVIUM_BDK),y) + +romstage-y += bdk/libbdk-arch/bdk-csr.c +romstage-y += bdk/libbdk-arch/bdk-model.c +romstage-y += bdk/libbdk-arch/bdk-numa.c +romstage-y += bdk/libbdk-boot/bdk-boot-status.c +romstage-y += bdk/libbdk-dram/bdk-dram-address.c +romstage-y += bdk/libbdk-dram/bdk-dram-config.c +romstage-y += bdk/libbdk-dram/bdk-dram-size.c +romstage-y += bdk/libbdk-dram/bdk-dram-test.c +romstage-y += bdk/libbdk-dram/bdk-dram-test-addrbus.c +romstage-y += bdk/libbdk-dram/bdk-dram-test-databus.c +romstage-y += bdk/libbdk-dram/bdk-dram-test-fastscan.c +romstage-y += bdk/libbdk-dram/bdk-dram-test-patfil.c +romstage-y += bdk/libbdk-driver/bdk-driver-rnm.c +romstage-y += bdk/libbdk-hal/bdk-clock.c +romstage-y += bdk/libbdk-hal/bdk-config.c +romstage-y += bdk/libbdk-hal/bdk-gpio.c +romstage-y += bdk/libbdk-hal/bdk-l2c.c +romstage-y += bdk/libbdk-os/bdk-init.c +romstage-y += bdk/libbdk-trust/bdk-trust.c +romstage-y += bdk/libdram/dram-env.c +romstage-y += bdk/libdram/dram-init-ddr3.c +romstage-y += bdk/libdram/dram-l2c.c +romstage-y += bdk/libdram/dram-spd.c +romstage-y += bdk/libdram/dram-tune-ddr3.c +romstage-y += bdk/libdram/lib_octeon_shared.c +romstage-y += bdk/libdram/libdram.c +romstage-y += bdk/libdram/libdram-config-load.c +romstage-y += bdk/libbdk-hal/bdk-access.c + +# FIXME: Get rid of lame_string.c +romstage-y += bdk/lame_string.c + +CPPFLAGS_common += -Isrc/vendorcode/cavium/include/bdk + +# For bdk_dram_get_size_mbytes() +ramstage-y += bdk/libbdk-dram/bdk-dram-size.c + +ramstage-y += bdk/libbdk-hal/bdk-config.c +ramstage-y += bdk/libbdk-hal/bdk-qlm.c +ramstage-y += bdk/libbdk-hal/bdk-pcie-cn8xxx.c +ramstage-y += bdk/libbdk-hal/bdk-pcie.c +ramstage-y += bdk/libbdk-hal/bdk-gpio.c +ramstage-y += bdk/libbdk-hal/bdk-ecam-io.c +ramstage-y += bdk/libbdk-hal/bdk-usb.c +ramstage-y += bdk/libbdk-hal/bdk-access.c + +ramstage-y += bdk/libbdk-arch/bdk-csr.c +ramstage-y += bdk/libbdk-arch/bdk-model.c +ramstage-y += bdk/libbdk-arch/bdk-numa.c +ramstage-y += bdk/libbdk-hal/qlm/bdk-qlm-common.c +ramstage-y += bdk/libbdk-hal/qlm/bdk-qlm-errata-cn8xxx.c +ramstage-y += bdk/libbdk-hal/qlm/bdk-qlm-common-sata.c +ramstage-y += bdk/libbdk-hal/qlm/bdk-qlm-margin-cn8xxx.c + +ramstage-y += bdk/libbdk-boot/bdk-boot-qlm.c +ramstage-y += bdk/libbdk-boot/bdk-boot-pcie.c +ramstage-y += bdk/libbdk-boot/bdk-boot-usb.c +ramstage-y += bdk/libbdk-boot/bdk-boot-gpio.c +ramstage-y += bdk/libbdk-boot/bdk-boot.c + +ramstage-y += bdk/libbdk-hal/if/bdk-if-phy.c +ramstage-y += bdk/libbdk-hal/if/bdk-if-phy-marvell.c +ramstage-y += bdk/libbdk-hal/if/bdk-if-phy-vetesse-8514.c +ramstage-y += bdk/libbdk-hal/if/bdk-if-phy-vetesse.c +ramstage-y += bdk/libbdk-driver/bdk-driver-mdio.c +ramstage-y += bdk/libbdk-driver/bdk-driver-rnm.c +ramstage-y += bdk/libbdk-hal/device/bdk-device.c +ramstage-y += bdk/libbdk-hal/bdk-ecam.c + +# FIXME: Get rid of lame_string.c +ramstage-y += bdk/lame_string.c + +ramstage-$(CONFIG_SOC_CAVIUM_CN81XX) += bdk/libbdk-hal/qlm/bdk-qlm-cn81xx.c + +endif diff --git a/src/vendorcode/eltan/Makefile.inc b/src/vendorcode/eltan/Makefile.inc deleted file mode 100644 index e6e8eba91c..0000000000 --- a/src/vendorcode/eltan/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -subdirs-$(CONFIG_USE_VENDORCODE_ELTAN) += security diff --git a/src/vendorcode/eltan/Makefile.mk b/src/vendorcode/eltan/Makefile.mk new file mode 100644 index 0000000000..e6e8eba91c --- /dev/null +++ b/src/vendorcode/eltan/Makefile.mk @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + +subdirs-$(CONFIG_USE_VENDORCODE_ELTAN) += security diff --git a/src/vendorcode/eltan/security/Makefile.inc b/src/vendorcode/eltan/security/Makefile.inc deleted file mode 100644 index d713bfaaee..0000000000 --- a/src/vendorcode/eltan/security/Makefile.inc +++ /dev/null @@ -1,9 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -subdirs-y += verified_boot -subdirs-y += mboot - -ifneq ($(filter y,$(CONFIG_VENDORCODE_ELTAN_VBOOT) $(CONFIG_VENDORCODE_ELTAN_MBOOT)),) -CPPFLAGS_common += -I$(src)/vendorcode/eltan/security/mboot -CPPFLAGS_common += -I$(src)/vendorcode/eltan/security/verified_boot -endif diff --git a/src/vendorcode/eltan/security/Makefile.mk b/src/vendorcode/eltan/security/Makefile.mk new file mode 100644 index 0000000000..d713bfaaee --- /dev/null +++ b/src/vendorcode/eltan/security/Makefile.mk @@ -0,0 +1,9 @@ +## SPDX-License-Identifier: GPL-2.0-only + +subdirs-y += verified_boot +subdirs-y += mboot + +ifneq ($(filter y,$(CONFIG_VENDORCODE_ELTAN_VBOOT) $(CONFIG_VENDORCODE_ELTAN_MBOOT)),) +CPPFLAGS_common += -I$(src)/vendorcode/eltan/security/mboot +CPPFLAGS_common += -I$(src)/vendorcode/eltan/security/verified_boot +endif diff --git a/src/vendorcode/eltan/security/mboot/Makefile.inc b/src/vendorcode/eltan/security/mboot/Makefile.inc deleted file mode 100644 index 99db2c31c2..0000000000 --- a/src/vendorcode/eltan/security/mboot/Makefile.inc +++ /dev/null @@ -1,12 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_VENDORCODE_ELTAN_MBOOT),y) -postcar-y += mboot.c - -ramstage-y += mboot.c -ramstage-y += mboot_func.c - -romstage-y += mboot.c -CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR) - -endif # CONFIG_VENDORCODE_ELTAN_VBOOT or CONFIG_VENDORCODE_ELTAN_MBOOT diff --git a/src/vendorcode/eltan/security/mboot/Makefile.mk b/src/vendorcode/eltan/security/mboot/Makefile.mk new file mode 100644 index 0000000000..99db2c31c2 --- /dev/null +++ b/src/vendorcode/eltan/security/mboot/Makefile.mk @@ -0,0 +1,12 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_VENDORCODE_ELTAN_MBOOT),y) +postcar-y += mboot.c + +ramstage-y += mboot.c +ramstage-y += mboot_func.c + +romstage-y += mboot.c +CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR) + +endif # CONFIG_VENDORCODE_ELTAN_VBOOT or CONFIG_VENDORCODE_ELTAN_MBOOT diff --git a/src/vendorcode/eltan/security/verified_boot/Makefile.inc b/src/vendorcode/eltan/security/verified_boot/Makefile.inc deleted file mode 100644 index 9158760322..0000000000 --- a/src/vendorcode/eltan/security/verified_boot/Makefile.inc +++ /dev/null @@ -1,35 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifneq ($(filter y,$(CONFIG_VENDORCODE_ELTAN_VBOOT) $(CONFIG_VENDORCODE_ELTAN_MBOOT)),) - -CPPFLAGS_common += -I$(src)/security/vboot - -bootblock-y += ../../../../security/vboot/vboot_lib.c -bootblock-y += vboot_check.c -postcar-y += vboot_check.c -romstage-y += vboot_check.c -ramstage-y += vboot_check.c - -ifeq ($(CONFIG_VENDORCODE_ELTAN_VBOOT),y) -cbfs-files-y += oemmanifest.bin -oemmanifest.bin-file := $(obj)/oemmanifest.bin -oemmanifest.bin-position := $(CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_LOC) -oemmanifest.bin-type := raw - -$(obj)/oemmanifest.bin: -ifeq ($(CONFIG_VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST),y) - dd if=/dev/zero of=$@ seek=8 bs=$(CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_ITEM_SIZE) count=$(CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_ITEMS) -else # ($(CONFIG_VERIFIED_BOOT_SIGNED_MANIFEST),y) - dd if=/dev/zero of=$@ bs=$(CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_ITEM_SIZE) count=$(CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_ITEMS) -endif # ($(CONFIG_VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST),y) - -ifeq ($(CONFIG_VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST),y) -cbfs-files-y += vboot_public_key.bin -vboot_public_key.bin-file := $(call strip_quotes, $(CONFIG_VENDORCODE_ELTAN_VBOOT_KEY_FILE)) -vboot_public_key.bin-position := $(CONFIG_VENDORCODE_ELTAN_VBOOT_KEY_LOCATION) -vboot_public_key.bin-type := raw - -endif # ($(CONFIG_VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST),y) -endif # CONFIG_VENDORCODE_ELTAN_VBOOT - -endif # CONFIG_VENDORCODE_ELTAN_VBOOT or CONFIG_VENDORCODE_ELTAN_MBOOT diff --git a/src/vendorcode/eltan/security/verified_boot/Makefile.mk b/src/vendorcode/eltan/security/verified_boot/Makefile.mk new file mode 100644 index 0000000000..9158760322 --- /dev/null +++ b/src/vendorcode/eltan/security/verified_boot/Makefile.mk @@ -0,0 +1,35 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifneq ($(filter y,$(CONFIG_VENDORCODE_ELTAN_VBOOT) $(CONFIG_VENDORCODE_ELTAN_MBOOT)),) + +CPPFLAGS_common += -I$(src)/security/vboot + +bootblock-y += ../../../../security/vboot/vboot_lib.c +bootblock-y += vboot_check.c +postcar-y += vboot_check.c +romstage-y += vboot_check.c +ramstage-y += vboot_check.c + +ifeq ($(CONFIG_VENDORCODE_ELTAN_VBOOT),y) +cbfs-files-y += oemmanifest.bin +oemmanifest.bin-file := $(obj)/oemmanifest.bin +oemmanifest.bin-position := $(CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_LOC) +oemmanifest.bin-type := raw + +$(obj)/oemmanifest.bin: +ifeq ($(CONFIG_VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST),y) + dd if=/dev/zero of=$@ seek=8 bs=$(CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_ITEM_SIZE) count=$(CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_ITEMS) +else # ($(CONFIG_VERIFIED_BOOT_SIGNED_MANIFEST),y) + dd if=/dev/zero of=$@ bs=$(CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_ITEM_SIZE) count=$(CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_ITEMS) +endif # ($(CONFIG_VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST),y) + +ifeq ($(CONFIG_VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST),y) +cbfs-files-y += vboot_public_key.bin +vboot_public_key.bin-file := $(call strip_quotes, $(CONFIG_VENDORCODE_ELTAN_VBOOT_KEY_FILE)) +vboot_public_key.bin-position := $(CONFIG_VENDORCODE_ELTAN_VBOOT_KEY_LOCATION) +vboot_public_key.bin-type := raw + +endif # ($(CONFIG_VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST),y) +endif # CONFIG_VENDORCODE_ELTAN_VBOOT + +endif # CONFIG_VENDORCODE_ELTAN_VBOOT or CONFIG_VENDORCODE_ELTAN_MBOOT diff --git a/src/vendorcode/google/Makefile.inc b/src/vendorcode/google/Makefile.inc deleted file mode 100644 index c9e83897ff..0000000000 --- a/src/vendorcode/google/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -subdirs-$(CONFIG_CHROMEOS) += chromeos - -ramstage-$(CONFIG_GOOGLE_DSM_CALIB) += dsm_calib.c -ramstage-$(CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION) += smbios.c diff --git a/src/vendorcode/google/Makefile.mk b/src/vendorcode/google/Makefile.mk new file mode 100644 index 0000000000..c9e83897ff --- /dev/null +++ b/src/vendorcode/google/Makefile.mk @@ -0,0 +1,6 @@ +## SPDX-License-Identifier: GPL-2.0-only + +subdirs-$(CONFIG_CHROMEOS) += chromeos + +ramstage-$(CONFIG_GOOGLE_DSM_CALIB) += dsm_calib.c +ramstage-$(CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION) += smbios.c diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc deleted file mode 100644 index af37a0981e..0000000000 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ /dev/null @@ -1,34 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ramstage-$(CONFIG_ELOG) += elog.c -ramstage-$(CONFIG_CHROMEOS_NVS) += gnvs.c -ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c -ramstage-$(CONFIG_CHROMEOS_RAMOOPS) += ramoops.c -ramstage-y += vpd_mac.c vpd_serialno.c vpd_calibration.c -ramstage-$(CONFIG_CHROMEOS_DISABLE_PLATFORM_HIERARCHY_ON_RESUME) += tpm2.c -ramstage-$(CONFIG_HAVE_REGULATORY_DOMAIN) += wrdd.c -ramstage-$(CONFIG_USE_SAR) += sar.c -ramstage-$(CONFIG_TPM_GOOGLE) += cr50_enable_update.c -ramstage-$(CONFIG_TPM_GOOGLE) += tpm_factory_config.c - -romstage-$(CONFIG_CHROMEOS_CSE_BOARD_RESET_OVERRIDE) += cse_board_reset.c -ramstage-$(CONFIG_CHROMEOS_CSE_BOARD_RESET_OVERRIDE) += cse_board_reset.c - -bootblock-y += watchdog.c -verstage-y += watchdog.c -romstage-y += watchdog.c -ramstage-y += watchdog.c - -romstage-$(CONFIG_CHROMEOS_DRAM_PART_NUMBER_IN_CBI) += dram_part_num_override.c -ramstage-$(CONFIG_CHROMEOS_FW_SPLASH_SCREEN) += splash.c - -# Add logo to the cbfs image -cbfs-files-$(CONFIG_CHROMEOS_FW_SPLASH_SCREEN) += cb_logo.bmp -cb_logo.bmp-file := $(call strip_quotes,$(CONFIG_CHROMEOS_LOGO_PATH)) -cb_logo.bmp-type := raw -cb_logo.bmp-compression := $(CBFS_COMPRESS_FLAG) - -cbfs-files-$(CONFIG_CHROMEOS_FW_SPLASH_SCREEN) += cb_plus_logo.bmp -cb_plus_logo.bmp-file := $(call strip_quotes,$(CONFIG_CHROMEBOOK_PLUS_LOGO_PATH)) -cb_plus_logo.bmp-type := raw -cb_plus_logo.bmp-compression := $(CBFS_COMPRESS_FLAG) diff --git a/src/vendorcode/google/chromeos/Makefile.mk b/src/vendorcode/google/chromeos/Makefile.mk new file mode 100644 index 0000000000..af37a0981e --- /dev/null +++ b/src/vendorcode/google/chromeos/Makefile.mk @@ -0,0 +1,34 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ramstage-$(CONFIG_ELOG) += elog.c +ramstage-$(CONFIG_CHROMEOS_NVS) += gnvs.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c +ramstage-$(CONFIG_CHROMEOS_RAMOOPS) += ramoops.c +ramstage-y += vpd_mac.c vpd_serialno.c vpd_calibration.c +ramstage-$(CONFIG_CHROMEOS_DISABLE_PLATFORM_HIERARCHY_ON_RESUME) += tpm2.c +ramstage-$(CONFIG_HAVE_REGULATORY_DOMAIN) += wrdd.c +ramstage-$(CONFIG_USE_SAR) += sar.c +ramstage-$(CONFIG_TPM_GOOGLE) += cr50_enable_update.c +ramstage-$(CONFIG_TPM_GOOGLE) += tpm_factory_config.c + +romstage-$(CONFIG_CHROMEOS_CSE_BOARD_RESET_OVERRIDE) += cse_board_reset.c +ramstage-$(CONFIG_CHROMEOS_CSE_BOARD_RESET_OVERRIDE) += cse_board_reset.c + +bootblock-y += watchdog.c +verstage-y += watchdog.c +romstage-y += watchdog.c +ramstage-y += watchdog.c + +romstage-$(CONFIG_CHROMEOS_DRAM_PART_NUMBER_IN_CBI) += dram_part_num_override.c +ramstage-$(CONFIG_CHROMEOS_FW_SPLASH_SCREEN) += splash.c + +# Add logo to the cbfs image +cbfs-files-$(CONFIG_CHROMEOS_FW_SPLASH_SCREEN) += cb_logo.bmp +cb_logo.bmp-file := $(call strip_quotes,$(CONFIG_CHROMEOS_LOGO_PATH)) +cb_logo.bmp-type := raw +cb_logo.bmp-compression := $(CBFS_COMPRESS_FLAG) + +cbfs-files-$(CONFIG_CHROMEOS_FW_SPLASH_SCREEN) += cb_plus_logo.bmp +cb_plus_logo.bmp-file := $(call strip_quotes,$(CONFIG_CHROMEBOOK_PLUS_LOGO_PATH)) +cb_plus_logo.bmp-type := raw +cb_plus_logo.bmp-compression := $(CBFS_COMPRESS_FLAG) diff --git a/src/vendorcode/intel/Makefile.inc b/src/vendorcode/intel/Makefile.inc deleted file mode 100644 index 4396ed3d4c..0000000000 --- a/src/vendorcode/intel/Makefile.inc +++ /dev/null @@ -1,30 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_UEFI_2_4_BINDING),y) -# ProccessorBind.h provided in Ia32 directory. Types are derived from ia32. -# It's possible to provide our own ProcessorBind.h using posix types. However, -# ProcessorBind.h isn't just about types. There's compiler definitions as well -# as ABI enforcement. Luckily long is not used in Ia32/ProcessorBind.h for -# a fixed width type. -CPPFLAGS_x86_32 += -I$(src)/vendorcode/intel/edk2/uefi_2.4/MdePkg/Include/Ia32 -CPPFLAGS_x86_64 += -I$(src)/vendorcode/intel/edk2/uefi_2.4/MdePkg/Include/X64 -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/uefi_2.4/MdePkg/Include -else ifeq ($(CONFIG_UDK_2017_BINDING),y) -CPPFLAGS_x86_32 += -I$(src)/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Ia32 -CPPFLAGS_x86_64 += -I$(src)/vendorcode/intel/edk2/UDK2017/MdePkg/Include/X64 -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/UDK2017/MdePkg/Include -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/UDK2017/IntelFsp2Pkg/Include -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/UDK2017/MdeModulePkg/Include -else ifeq ($(CONFIG_UDK_202005_BINDING),y) -CPPFLAGS_x86_32 += -I$(src)/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Ia32 -CPPFLAGS_x86_64 += -I$(src)/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/X64 -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/edk2-stable202005/MdeModulePkg/Include -else ifeq ($(CONFIG_UDK_202302_BINDING),y) -CPPFLAGS_x86_32 += -I$(src)/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include/Ia32 -CPPFLAGS_x86_64 += -I$(src)/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include/X64 -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/edk2-stable202302/IntelFsp2Pkg/Include -CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/edk2-stable202302/UefiCpuPkg/Include/ -endif diff --git a/src/vendorcode/intel/Makefile.mk b/src/vendorcode/intel/Makefile.mk new file mode 100644 index 0000000000..4396ed3d4c --- /dev/null +++ b/src/vendorcode/intel/Makefile.mk @@ -0,0 +1,30 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_UEFI_2_4_BINDING),y) +# ProccessorBind.h provided in Ia32 directory. Types are derived from ia32. +# It's possible to provide our own ProcessorBind.h using posix types. However, +# ProcessorBind.h isn't just about types. There's compiler definitions as well +# as ABI enforcement. Luckily long is not used in Ia32/ProcessorBind.h for +# a fixed width type. +CPPFLAGS_x86_32 += -I$(src)/vendorcode/intel/edk2/uefi_2.4/MdePkg/Include/Ia32 +CPPFLAGS_x86_64 += -I$(src)/vendorcode/intel/edk2/uefi_2.4/MdePkg/Include/X64 +CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/uefi_2.4/MdePkg/Include +else ifeq ($(CONFIG_UDK_2017_BINDING),y) +CPPFLAGS_x86_32 += -I$(src)/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Ia32 +CPPFLAGS_x86_64 += -I$(src)/vendorcode/intel/edk2/UDK2017/MdePkg/Include/X64 +CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/UDK2017/MdePkg/Include +CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/UDK2017/IntelFsp2Pkg/Include +CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/UDK2017/MdeModulePkg/Include +else ifeq ($(CONFIG_UDK_202005_BINDING),y) +CPPFLAGS_x86_32 += -I$(src)/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Ia32 +CPPFLAGS_x86_64 += -I$(src)/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/X64 +CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include +CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include +CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/edk2-stable202005/MdeModulePkg/Include +else ifeq ($(CONFIG_UDK_202302_BINDING),y) +CPPFLAGS_x86_32 += -I$(src)/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include/Ia32 +CPPFLAGS_x86_64 += -I$(src)/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include/X64 +CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include +CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/edk2-stable202302/IntelFsp2Pkg/Include +CPPFLAGS_common += -I$(src)/vendorcode/intel/edk2/edk2-stable202302/UefiCpuPkg/Include/ +endif diff --git a/src/vendorcode/mediatek/Makefile.inc b/src/vendorcode/mediatek/Makefile.inc deleted file mode 100644 index 6befcdecef..0000000000 --- a/src/vendorcode/mediatek/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -subdirs-$(CONFIG_SOC_MEDIATEK_MT8192) += mt8192 -subdirs-$(CONFIG_SOC_MEDIATEK_MT8195) += mt8195 diff --git a/src/vendorcode/mediatek/Makefile.mk b/src/vendorcode/mediatek/Makefile.mk new file mode 100644 index 0000000000..6befcdecef --- /dev/null +++ b/src/vendorcode/mediatek/Makefile.mk @@ -0,0 +1,2 @@ +subdirs-$(CONFIG_SOC_MEDIATEK_MT8192) += mt8192 +subdirs-$(CONFIG_SOC_MEDIATEK_MT8195) += mt8195 diff --git a/src/vendorcode/mediatek/mt8192/Makefile.inc b/src/vendorcode/mediatek/mt8192/Makefile.inc deleted file mode 100644 index dd6aa6f93c..0000000000 --- a/src/vendorcode/mediatek/mt8192/Makefile.inc +++ /dev/null @@ -1,5 +0,0 @@ -subdirs-y += dramc - -CPPFLAGS_common += -Isrc/soc/mediatek/mt8192/include -CPPFLAGS_common += -Isrc/soc/mediatek/common/include -CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8192/include diff --git a/src/vendorcode/mediatek/mt8192/Makefile.mk b/src/vendorcode/mediatek/mt8192/Makefile.mk new file mode 100644 index 0000000000..dd6aa6f93c --- /dev/null +++ b/src/vendorcode/mediatek/mt8192/Makefile.mk @@ -0,0 +1,5 @@ +subdirs-y += dramc + +CPPFLAGS_common += -Isrc/soc/mediatek/mt8192/include +CPPFLAGS_common += -Isrc/soc/mediatek/common/include +CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8192/include diff --git a/src/vendorcode/mediatek/mt8192/dramc/Makefile.inc b/src/vendorcode/mediatek/mt8192/dramc/Makefile.inc deleted file mode 100644 index 1c4870a860..0000000000 --- a/src/vendorcode/mediatek/mt8192/dramc/Makefile.inc +++ /dev/null @@ -1,21 +0,0 @@ -romstage-y += emi.c - -romstage-y += ANA_init_config.c -romstage-y += DIG_NONSHUF_config.c -romstage-y += DIG_SHUF_config.c -romstage-y += dramc_actiming.c -romstage-y += dramc_dv_freq_related.c -romstage-y += dramc_dvfs.c -romstage-y += dramc_lowpower.c -romstage-y += DRAM_config_collctioin.c -romstage-y += dramc_pi_basic_api.c -romstage-y += dramc_pi_calibration_api.c -romstage-y += dramc_pi_main.c -romstage-y += DRAMC_SUBSYS_config.c -romstage-y += dramc_top.c -romstage-y += dramc_tracking.c -romstage-y += dramc_utility.c -romstage-y += Hal_io.c -romstage-y += LP4_dram_init.c - -ramstage-y += emi.c diff --git a/src/vendorcode/mediatek/mt8192/dramc/Makefile.mk b/src/vendorcode/mediatek/mt8192/dramc/Makefile.mk new file mode 100644 index 0000000000..1c4870a860 --- /dev/null +++ b/src/vendorcode/mediatek/mt8192/dramc/Makefile.mk @@ -0,0 +1,21 @@ +romstage-y += emi.c + +romstage-y += ANA_init_config.c +romstage-y += DIG_NONSHUF_config.c +romstage-y += DIG_SHUF_config.c +romstage-y += dramc_actiming.c +romstage-y += dramc_dv_freq_related.c +romstage-y += dramc_dvfs.c +romstage-y += dramc_lowpower.c +romstage-y += DRAM_config_collctioin.c +romstage-y += dramc_pi_basic_api.c +romstage-y += dramc_pi_calibration_api.c +romstage-y += dramc_pi_main.c +romstage-y += DRAMC_SUBSYS_config.c +romstage-y += dramc_top.c +romstage-y += dramc_tracking.c +romstage-y += dramc_utility.c +romstage-y += Hal_io.c +romstage-y += LP4_dram_init.c + +ramstage-y += emi.c diff --git a/src/vendorcode/mediatek/mt8195/Makefile.inc b/src/vendorcode/mediatek/mt8195/Makefile.inc deleted file mode 100644 index f5ce6ee3b6..0000000000 --- a/src/vendorcode/mediatek/mt8195/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -subdirs-y += dramc - -CPPFLAGS_common += -Isrc/soc/mediatek/mt8195/include -CPPFLAGS_common += -Isrc/soc/mediatek/common/include -CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8195/include -CPPFLAGS_common += -DFOR_COREBOOT diff --git a/src/vendorcode/mediatek/mt8195/Makefile.mk b/src/vendorcode/mediatek/mt8195/Makefile.mk new file mode 100644 index 0000000000..f5ce6ee3b6 --- /dev/null +++ b/src/vendorcode/mediatek/mt8195/Makefile.mk @@ -0,0 +1,6 @@ +subdirs-y += dramc + +CPPFLAGS_common += -Isrc/soc/mediatek/mt8195/include +CPPFLAGS_common += -Isrc/soc/mediatek/common/include +CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8195/include +CPPFLAGS_common += -DFOR_COREBOOT diff --git a/src/vendorcode/mediatek/mt8195/dramc/Makefile.inc b/src/vendorcode/mediatek/mt8195/dramc/Makefile.inc deleted file mode 100644 index 8d03618531..0000000000 --- a/src/vendorcode/mediatek/mt8195/dramc/Makefile.inc +++ /dev/null @@ -1,22 +0,0 @@ -romstage-y += emi.c - -romstage-y += ANA_init_config.c -romstage-y += DIG_NONSHUF_config.c -romstage-y += DIG_SHUF_config.c -romstage-y += dramc_actiming.c -romstage-y += dramc_dv_freq_related.c -romstage-y += dramc_dvfs.c -romstage-y += dramc_lowpower.c -romstage-y += DRAM_config_collctioin.c -romstage-y += dramc_pi_basic_api.c -romstage-y += dramc_pi_calibration_api.c -romstage-y += dramc_pi_main.c -romstage-y += DRAMC_SUBSYS_config.c -romstage-y += dramc_top.c -romstage-y += dramc_tracking.c -romstage-y += dramc_utility.c -romstage-y += Hal_io.c -romstage-y += LP4_dram_init.c -romstage-y += dramc_debug.c - -ramstage-y += emi.c diff --git a/src/vendorcode/mediatek/mt8195/dramc/Makefile.mk b/src/vendorcode/mediatek/mt8195/dramc/Makefile.mk new file mode 100644 index 0000000000..8d03618531 --- /dev/null +++ b/src/vendorcode/mediatek/mt8195/dramc/Makefile.mk @@ -0,0 +1,22 @@ +romstage-y += emi.c + +romstage-y += ANA_init_config.c +romstage-y += DIG_NONSHUF_config.c +romstage-y += DIG_SHUF_config.c +romstage-y += dramc_actiming.c +romstage-y += dramc_dv_freq_related.c +romstage-y += dramc_dvfs.c +romstage-y += dramc_lowpower.c +romstage-y += DRAM_config_collctioin.c +romstage-y += dramc_pi_basic_api.c +romstage-y += dramc_pi_calibration_api.c +romstage-y += dramc_pi_main.c +romstage-y += DRAMC_SUBSYS_config.c +romstage-y += dramc_top.c +romstage-y += dramc_tracking.c +romstage-y += dramc_utility.c +romstage-y += Hal_io.c +romstage-y += LP4_dram_init.c +romstage-y += dramc_debug.c + +ramstage-y += emi.c diff --git a/src/vendorcode/siemens/Makefile.inc b/src/vendorcode/siemens/Makefile.inc deleted file mode 100644 index 88fd1c3911..0000000000 --- a/src/vendorcode/siemens/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -subdirs-$(CONFIG_USE_SIEMENS_HWILIB) += hwilib diff --git a/src/vendorcode/siemens/Makefile.mk b/src/vendorcode/siemens/Makefile.mk new file mode 100644 index 0000000000..88fd1c3911 --- /dev/null +++ b/src/vendorcode/siemens/Makefile.mk @@ -0,0 +1,3 @@ +## SPDX-License-Identifier: GPL-2.0-only + +subdirs-$(CONFIG_USE_SIEMENS_HWILIB) += hwilib diff --git a/src/vendorcode/siemens/hwilib/Makefile.inc b/src/vendorcode/siemens/hwilib/Makefile.inc deleted file mode 100644 index 7b99c0c748..0000000000 --- a/src/vendorcode/siemens/hwilib/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -romstage-y += hwilib.c -ramstage-y += hwilib.c - -CPPFLAGS_common += -I$(src)/vendorcode/siemens/hwilib diff --git a/src/vendorcode/siemens/hwilib/Makefile.mk b/src/vendorcode/siemens/hwilib/Makefile.mk new file mode 100644 index 0000000000..7b99c0c748 --- /dev/null +++ b/src/vendorcode/siemens/hwilib/Makefile.mk @@ -0,0 +1,6 @@ +## SPDX-License-Identifier: GPL-2.0-only + +romstage-y += hwilib.c +ramstage-y += hwilib.c + +CPPFLAGS_common += -I$(src)/vendorcode/siemens/hwilib -- cgit v1.2.3