From 444edcba5d648582a98c0ad46605cd0dd7a1f11d Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Wed, 8 May 2024 19:46:53 +0200
Subject: vc/amd/opensil/*/mpio/chip.h: add missing include guards

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Idef3b661b1cf3008373e61e0760a7dd3b9e9fede
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82261
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h | 5 +++++
 src/vendorcode/amd/opensil/stub/mpio/chip.h      | 5 +++++
 2 files changed, 10 insertions(+)

(limited to 'src/vendorcode')

diff --git a/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h b/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h
index 4a78ef5f2b..36d6bafce8 100644
--- a/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h
+++ b/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h
@@ -1,5 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#ifndef OPENSIL_GENOA_POC_MPIO_CHIP_H
+#define OPENSIL_GENOA_POC_MPIO_CHIP_H
+
 #include <stdint.h>
 
 /*
@@ -64,3 +67,5 @@ struct vendorcode_amd_opensil_genoa_poc_mpio_config {
 	uint8_t clock_pm : 1;
 	uint8_t bmc : 1;
 };
+
+#endif /* OPENSIL_GENOA_POC_MPIO_CHIP_H */
diff --git a/src/vendorcode/amd/opensil/stub/mpio/chip.h b/src/vendorcode/amd/opensil/stub/mpio/chip.h
index 96f60bea4c..0957ff0213 100644
--- a/src/vendorcode/amd/opensil/stub/mpio/chip.h
+++ b/src/vendorcode/amd/opensil/stub/mpio/chip.h
@@ -1,5 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#ifndef OPENSIL_STUB_MPIO_CHIP_H
+#define OPENSIL_STUB_MPIO_CHIP_H
+
 #include <types.h>
 
 enum mpio_engine_type {
@@ -73,3 +76,5 @@ struct vendorcode_amd_opensil_stub_mpio_config {
 	enum pcie_slot_power_limit_scale slot_power_limit_scale;
 	bool bmc;
 };
+
+#endif /* OPENSIL_STUB_MPIO_CHIP_H */
-- 
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