From 3a7389ef1055769f7c6d9ce53025b69e69f15349 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Thu, 23 Jul 2020 18:22:30 +0200 Subject: amd/picasso: rework USB2 PHY tune parameter handling BUG=b:161923068 Change-Id: I67f23c0602e345fbd806e661a4462cf07f93ef64 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/43783 Reviewed-by: Angel Pons Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/vendorcode/amd/fsp/picasso/FspsUpd.h | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'src/vendorcode') diff --git a/src/vendorcode/amd/fsp/picasso/FspsUpd.h b/src/vendorcode/amd/fsp/picasso/FspsUpd.h index 4298b11b5f..5adbb81f6c 100644 --- a/src/vendorcode/amd/fsp/picasso/FspsUpd.h +++ b/src/vendorcode/amd/fsp/picasso/FspsUpd.h @@ -11,6 +11,7 @@ #define FSPS_UPD_DXIO_DESCRIPTOR_COUNT 8 #define FSPS_UPD_DDI_DESCRIPTOR_COUNT 4 +#define FSPS_UPD_USB2_PORT_COUNT 6 typedef struct __packed { /** Offset 0x0020**/ uint32_t emmc0_mode; @@ -21,12 +22,7 @@ typedef struct __packed { /** Offset 0x00D0**/ uint8_t unused2[16]; /** Offset 0x00E0**/ uint8_t fch_usb_version_major; /** Offset 0x00E1**/ uint8_t fch_usb_version_minor; - /** Offset 0x00E2**/ uint8_t fch_usb_2_port0_phy_tune[9]; - /** Offset 0x00EB**/ uint8_t fch_usb_2_port1_phy_tune[9]; - /** Offset 0x00F4**/ uint8_t fch_usb_2_port2_phy_tune[9]; - /** Offset 0x00FD**/ uint8_t fch_usb_2_port3_phy_tune[9]; - /** Offset 0x0106**/ uint8_t fch_usb_2_port4_phy_tune[9]; - /** Offset 0x010F**/ uint8_t fch_usb_2_port5_phy_tune[9]; + /** Offset 0x00E2**/ uint8_t fch_usb_2_port_phy_tune[FSPS_UPD_USB2_PORT_COUNT][9]; /** Offset 0x0118**/ uint8_t fch_usb_device_removable; /** Offset 0x0119**/ uint8_t fch_usb_3_port_force_gen1; /** Offset 0x011A**/ uint8_t fch_usb_u3_rx_det_wa_enable; -- cgit v1.2.3