From 3a7102d628a5af3531d640d7121dd0eebd47b7cd Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 14 Nov 2024 13:57:16 +0100 Subject: vendorcode/intel/fsp/skx_sp: Fix PCI domain scanning Properly scan all logical stack when creating PCI domains. Fixes PCI bus ranges being used on other stacks, since they look unused, as not all stacks are checked. Change-Id: I13c8b389a585dbccec182d3c98021f1d9d648b2c Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/85138 Tested-by: build bot (Jenkins) Reviewed-by: Shuo Liu Reviewed-by: Lean Sheng Tan --- src/vendorcode/intel/fsp/fsp2_0/skylake_sp/FspmUpd.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/vendorcode') diff --git a/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/FspmUpd.h index 7a6ecb1325..f81e218634 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/FspmUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/FspmUpd.h @@ -137,9 +137,7 @@ typedef enum { } IIO_STACKS; #define IioStack0 CSTACK -/* MAX_LOGIC_IIO_STACK is needed by uncore_acpi.c, define the same value from nb_acpi.c for - Skylake-SP to keep the same behavior. */ -#define MAX_LOGIC_IIO_STACK PSTACK2 +#define MAX_LOGIC_IIO_STACK MAX_STACKS /** NTB Per Port Definition -- cgit v1.2.3