From 3a077965dedfc757d05ee88561012981da591677 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 23 Mar 2022 21:35:32 +0100 Subject: amd/fam15tn/gcccar.inc: Fix msr access with clang Change-Id: I21bebd475dce373a77626d2e78a0ab10678ea8b6 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/63044 Tested-by: build bot (Jenkins) Reviewed-by: Elyes Haouas --- src/vendorcode/amd/agesa/f15tn/gcccar.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/vendorcode') diff --git a/src/vendorcode/amd/agesa/f15tn/gcccar.inc b/src/vendorcode/amd/agesa/f15tn/gcccar.inc index 5a0c1c458b..fb49c17c59 100644 --- a/src/vendorcode/amd/agesa/f15tn/gcccar.inc +++ b/src/vendorcode/amd/agesa/f15tn/gcccar.inc @@ -971,9 +971,9 @@ fam15_skipClearingBit4: 1: #.if (al == 01h) # TN only #Enable MSRC001_001F[EnableCf8ExtCfg] mov $NB_CFG, %ecx # MSR:C001_001F - _rdmsr + _RDMSR bts $(ENABLE_CF8_EXT_CFG - 32), %edx - _wrmsr + _WRMSR # Set F3x44[6, CpuErrDis] = 1 MAKE_EXT_PCI_ADDR 0, 0, 24, FUNC_3, 0x44 //MCA_NB_CFG //mov $(1 << 31 | 2 << 28 | (((MCA_NB_CFG) & (0x0F00)) >> 8) << 24 | 2 << 16 | 1 << 11 | FUNC_3 << 8), %eax -- cgit v1.2.3