From 182e56964e8504ba3e460d7c6af59e1f900ab373 Mon Sep 17 00:00:00 2001 From: Lennart Eichhorn Date: Fri, 1 Dec 2023 18:17:39 +0100 Subject: vc/amd/psp: Remove unknown section flags The `d` flag used in .section is unknown in LLVM/clang 17 and fails the build. It is also not documented in the ARM compiler manual. The GNU assembler supports the `d` flag but it also seems to compile without. ARM compiler manual: https://developer.arm.com/documentation/101754/0621/armclang-Reference/armclang-Integrated-Assembler/Section-directives GNU compiler manual: https://sourceware.org/binutils/docs/as/Section.html `coreboot.rom` does not change between compiling a google skyrim board with or without this patch. However the debug info for the following three files in the build directory changes with this patch: * build/verstage/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.o * build/cbfs/fallback/verstage.elf * build/cbfs/fallback/verstage.debug Change-Id: Ie3735b72349b0cfdd27364a39bcdda390af7bfa5 Signed-off-by: Lennart Eichhorn Reviewed-on: https://review.coreboot.org/c/coreboot/+/79366 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S | 2 +- src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S | 2 +- src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S | 2 +- src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/vendorcode') diff --git a/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S index 40ea4111cd..db6556cb0a 100644 --- a/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S +++ b/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S @@ -29,7 +29,7 @@ .arm .global LastBytes -.section PSP_FOOTER_DATA, "ad", %note +.section PSP_FOOTER_DATA, "a", %note .balign 64 // Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte diff --git a/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S index 40ea4111cd..db6556cb0a 100644 --- a/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S +++ b/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S @@ -29,7 +29,7 @@ .arm .global LastBytes -.section PSP_FOOTER_DATA, "ad", %note +.section PSP_FOOTER_DATA, "a", %note .balign 64 // Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte diff --git a/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S index 40ea4111cd..db6556cb0a 100644 --- a/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S +++ b/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S @@ -29,7 +29,7 @@ .arm .global LastBytes -.section PSP_FOOTER_DATA, "ad", %note +.section PSP_FOOTER_DATA, "a", %note .balign 64 // Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte diff --git a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S index 40ea4111cd..db6556cb0a 100644 --- a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S +++ b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S @@ -29,7 +29,7 @@ .arm .global LastBytes -.section PSP_FOOTER_DATA, "ad", %note +.section PSP_FOOTER_DATA, "a", %note .balign 64 // Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte -- cgit v1.2.3