From 022b1b992f24890a04851dccc2829284a0431d6a Mon Sep 17 00:00:00 2001 From: Xi Chen Date: Fri, 5 Feb 2021 11:45:12 +0800 Subject: vendor: mediatek: Add mediatek mt8192 dram initialization code This is the DRAM initialization code from the reference implementation released by Mediatek for MT8192. The DRAM calibration code can be taken as a standalone library, used by different boot loaders for initializing DRAM and following a different coding style (coreboot was using Linux Kernel coding style), so we have to put it in vendor code folder. Signed-off-by: Xi Chen Change-Id: I3853204578069c6abf52689ea6f5d88841414bd4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50294 Tested-by: build bot (Jenkins) Reviewed-by: Hung-Te Lin Reviewed-by: Nico Huber --- src/vendorcode/mediatek/mt8192/dramc/Makefile.inc | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 src/vendorcode/mediatek/mt8192/dramc/Makefile.inc (limited to 'src/vendorcode/mediatek/mt8192/dramc/Makefile.inc') diff --git a/src/vendorcode/mediatek/mt8192/dramc/Makefile.inc b/src/vendorcode/mediatek/mt8192/dramc/Makefile.inc new file mode 100644 index 0000000000..1c4870a860 --- /dev/null +++ b/src/vendorcode/mediatek/mt8192/dramc/Makefile.inc @@ -0,0 +1,21 @@ +romstage-y += emi.c + +romstage-y += ANA_init_config.c +romstage-y += DIG_NONSHUF_config.c +romstage-y += DIG_SHUF_config.c +romstage-y += dramc_actiming.c +romstage-y += dramc_dv_freq_related.c +romstage-y += dramc_dvfs.c +romstage-y += dramc_lowpower.c +romstage-y += DRAM_config_collctioin.c +romstage-y += dramc_pi_basic_api.c +romstage-y += dramc_pi_calibration_api.c +romstage-y += dramc_pi_main.c +romstage-y += DRAMC_SUBSYS_config.c +romstage-y += dramc_top.c +romstage-y += dramc_tracking.c +romstage-y += dramc_utility.c +romstage-y += Hal_io.c +romstage-y += LP4_dram_init.c + +ramstage-y += emi.c -- cgit v1.2.3