From 8e6d5f2937c169914e46b5ebc973e5df5e4290a7 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Sun, 30 Aug 2020 13:51:44 +0530 Subject: {include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent Convert 0X -> 0x Signed-off-by: Subrata Banik Change-Id: Iea3ca67908135d0e85083a05bad2ea176ca34095 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44926 Tested-by: build bot (Jenkins) Reviewed-by: HAOUAS Elyes Reviewed-by: Paul Menzel Reviewed-by: Angel Pons --- src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Guid/AprioriFileName.h | 2 +- .../intel/edk2/UDK2017/MdePkg/Include/IndustryStandard/Tpm20.h | 2 +- .../intel/edk2/edk2-stable202005/MdePkg/Include/Guid/AprioriFileName.h | 2 +- .../edk2/edk2-stable202005/MdePkg/Include/IndustryStandard/Tpm20.h | 2 +- src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'src/vendorcode/intel') diff --git a/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Guid/AprioriFileName.h b/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Guid/AprioriFileName.h index eac2385bcb..4c1691f40e 100644 --- a/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Guid/AprioriFileName.h +++ b/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Guid/AprioriFileName.h @@ -21,7 +21,7 @@ #define __PEI_APRIORI_FILE_NAME_H__ #define PEI_APRIORI_FILE_NAME_GUID \ - { 0x1b45cc0a, 0x156a, 0x428a, { 0x62, 0XAF, 0x49, 0x86, 0x4d, 0xa0, 0xe6, 0xe6 } } + { 0x1b45cc0a, 0x156a, 0x428a, { 0x62, 0xAF, 0x49, 0x86, 0x4d, 0xa0, 0xe6, 0xe6 } } /// diff --git a/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/IndustryStandard/Tpm20.h b/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/IndustryStandard/Tpm20.h index 697a2d7be4..066ce1641b 100644 --- a/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/IndustryStandard/Tpm20.h +++ b/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/IndustryStandard/Tpm20.h @@ -486,7 +486,7 @@ typedef UINT16 TPM_EO; // Table 18 - TPM_ST Constants typedef UINT16 TPM_ST; #define TPM_ST_RSP_COMMAND (TPM_ST)(0x00C4) -#define TPM_ST_NULL (TPM_ST)(0X8000) +#define TPM_ST_NULL (TPM_ST)(0x8000) #define TPM_ST_NO_SESSIONS (TPM_ST)(0x8001) #define TPM_ST_SESSIONS (TPM_ST)(0x8002) #define TPM_ST_ATTEST_NV (TPM_ST)(0x8014) diff --git a/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Guid/AprioriFileName.h b/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Guid/AprioriFileName.h index ab34b17ea8..f899ed91f5 100644 --- a/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Guid/AprioriFileName.h +++ b/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Guid/AprioriFileName.h @@ -15,7 +15,7 @@ #define __PEI_APRIORI_FILE_NAME_H__ #define PEI_APRIORI_FILE_NAME_GUID \ - { 0x1b45cc0a, 0x156a, 0x428a, { 0x62, 0XAF, 0x49, 0x86, 0x4d, 0xa0, 0xe6, 0xe6 } } + { 0x1b45cc0a, 0x156a, 0x428a, { 0x62, 0xAF, 0x49, 0x86, 0x4d, 0xa0, 0xe6, 0xe6 } } /// diff --git a/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/IndustryStandard/Tpm20.h b/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/IndustryStandard/Tpm20.h index 39332b15e8..a294dcbc7c 100644 --- a/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/IndustryStandard/Tpm20.h +++ b/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/IndustryStandard/Tpm20.h @@ -480,7 +480,7 @@ typedef UINT16 TPM_EO; // Table 18 - TPM_ST Constants typedef UINT16 TPM_ST; #define TPM_ST_RSP_COMMAND (TPM_ST)(0x00C4) -#define TPM_ST_NULL (TPM_ST)(0X8000) +#define TPM_ST_NULL (TPM_ST)(0x8000) #define TPM_ST_NO_SESSIONS (TPM_ST)(0x8001) #define TPM_ST_SESSIONS (TPM_ST)(0x8002) #define TPM_ST_ATTEST_NV (TPM_ST)(0x8014) diff --git a/src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h index 770390d606..05210d6801 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h @@ -683,7 +683,7 @@ typedef struct { /** Offset 0x0124 - PCIe Disable Spread Spectrum Clocking PCIe Disable Spread Spectrum Clocking. Normal Operation(0x0)(Default) - SSC enabled, - Disable SSC(0X1) - Disable SSC per platform design or for compliance testing + Disable SSC(0x1) - Disable SSC per platform design or for compliance testing 0:Normal Operation, 1:Disable SSC **/ UINT8 PegDisableSpreadSpectrumClocking; -- cgit v1.2.3