From 72179fad42e2858b08719061cccb2768f4546d17 Mon Sep 17 00:00:00 2001
From: Lee Leahy <leroy.p.leahy@intel.com>
Date: Sat, 4 Jun 2016 16:09:44 -0700
Subject: soc/intel/quark: Pass serial port address to FSP

Pass the serial port address to FSP using a UPD value in the MemoryInit
API.

TEST=Build and run on Galileo Gen2

Change-Id: I86449d80310b7b34ac503ebd2671a4052b080730
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15079
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
---
 src/vendorcode/intel/fsp/fsp1_1/quark/FspUpdVpd.h | 38 ++++++++++-------------
 1 file changed, 16 insertions(+), 22 deletions(-)

(limited to 'src/vendorcode/intel')

diff --git a/src/vendorcode/intel/fsp/fsp1_1/quark/FspUpdVpd.h b/src/vendorcode/intel/fsp/fsp1_1/quark/FspUpdVpd.h
index ef0cf092e5..86f548777c 100644
--- a/src/vendorcode/intel/fsp/fsp1_1/quark/FspUpdVpd.h
+++ b/src/vendorcode/intel/fsp/fsp1_1/quark/FspUpdVpd.h
@@ -77,39 +77,39 @@ typedef struct {
 
 
 typedef struct {
-/** Offset 0x0020
+/** Offset 0x0018
 **/
   UINT64                      Signature;
-/** Offset 0x0028
+/** Offset 0x0020
 **/
   UINT64                      Revision;
-/** Offset 0x0030
+/** Offset 0x0028
 **/
   UINT32                      PcdRmuBinaryBaseAddress;
-/** Offset 0x0034
+/** Offset 0x002C
 **/
-  UINT32                      PcdRmuBinaryLen;
-/** Offset 0x0038
+  UINT32                      UnusedUpdSpace0;
+/** Offset 0x0030
 **/
-  UINT8                       PcdSmmTsegSize;
-/** Offset 0x0039
+  UINT32                      PcdSerialRegisterBase;
+/** Offset 0x0034
 **/
-  UINT8                       PcdPlatformType;
-/** Offset 0x003A
+  UINT8                       PcdSmmTsegSize;
+/** Offset 0x0035
 **/
-  UINT8                       ReservedMemoryInitUpd[22];
+  UINT8                       ReservedMemoryInitUpd[3];
 } MEMORY_INIT_UPD;
 
 typedef struct {
-/** Offset 0x0050
+/** Offset 0x0038
 **/
   UINT64                      Signature;
-/** Offset 0x0058
+/** Offset 0x0040
 **/
   UINT64                      Revision;
-/** Offset 0x0060
+/** Offset 0x0048
 **/
-  UINT8                       ReservedSiliconInitUpd[32];
+  UINT16                      PcdRegionTerminator;
 } SILICON_INIT_UPD;
 
 #define FSP_UPD_SIGNATURE                0x244450554B525124        /* '$QRKUPD$' */
@@ -130,17 +130,11 @@ typedef struct _UPD_DATA_REGION {
 **/
   UINT32                      SiliconInitUpdOffset;
 /** Offset 0x0018
-**/
-  UINT64                      ReservedUpd1;
-/** Offset 0x0020
 **/
   MEMORY_INIT_UPD             MemoryInitUpd;
-/** Offset 0x0050
+/** Offset 0x0038
 **/
   SILICON_INIT_UPD            SiliconInitUpd;
-/** Offset 0x0080
-**/
-  UINT16                      PcdRegionTerminator;
 } UPD_DATA_REGION;
 
 #define FSP_IMAGE_ID    0x305053462D4B5551        /* 'QUK-FSP0' */
-- 
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