From 5c1964058f5a9e1f144cbb0a004181f1d046afe4 Mon Sep 17 00:00:00 2001
From: Tim Chu <Tim.Chu@quantatw.com>
Date: Tue, 13 Dec 2022 12:09:44 +0000
Subject: soc/intel/xeon_sp/uncore_acpi.c: Add SPR-SP support

Add support for Intel SPR-SP to uncore_acpi.c.

Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Signed-off-by: Shelly Chang <Shelly_Chang@wiwynn.com>
Change-Id: I4c436a60743bee21b3b6e4060d7874a6cdc75ecf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71958
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Jonathan Zhang <jon.zhixiong.zhang@gmail.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
---
 src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h | 2 ++
 src/vendorcode/intel/fsp/fsp2_0/skylake_sp/FspmUpd.h       | 5 +++++
 2 files changed, 7 insertions(+)

(limited to 'src/vendorcode/intel')

diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
index f36b56806d..c95a2551d4 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
@@ -131,6 +131,8 @@ typedef enum {
 	MAX_STACKS
 } IIO_STACKS;
 
+#define IioStack0 CSTACK
+
 typedef struct uint64_t_struct {
 	uint32_t  lo;
 	uint32_t  hi;
diff --git a/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/FspmUpd.h
index 066c2aef24..7a6ecb1325 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/FspmUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/FspmUpd.h
@@ -136,6 +136,11 @@ typedef enum {
 	MAX_STACKS
 } IIO_STACKS;
 
+#define IioStack0 CSTACK
+/* MAX_LOGIC_IIO_STACK is needed by uncore_acpi.c, define the same value from nb_acpi.c for
+   Skylake-SP to keep the same behavior. */
+#define MAX_LOGIC_IIO_STACK PSTACK2
+
 /**
  NTB Per Port Definition
  **/
-- 
cgit v1.2.3