From 489c10ee5440981c6a2b06e13a856aa4fd6d07e7 Mon Sep 17 00:00:00 2001 From: Ronak Kanabar Date: Mon, 7 Oct 2019 19:01:05 +0530 Subject: src/vendorcode/intel: Update Comet Lake FSP headers as per FSP v1394 "EnforceEDebugMode" UPD added in FSP_S_TEST_CONFIG Change-Id: I1583d8583db20b29505e5a7ae4084013334c87c2 Signed-off-by: Ronak Kanabar Reviewed-on: https://review.coreboot.org/c/coreboot/+/35852 Reviewed-by: Shelley Chen Reviewed-by: Paul Menzel Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- .../intel/fsp/fsp2_0/cometlake/FspsUpd.h | 104 +++++++++++---------- 1 file changed, 57 insertions(+), 47 deletions(-) (limited to 'src/vendorcode/intel') diff --git a/src/vendorcode/intel/fsp/fsp2_0/cometlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/cometlake/FspsUpd.h index 0df3063e5c..f56cba9b5c 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/cometlake/FspsUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/cometlake/FspsUpd.h @@ -37,49 +37,49 @@ are permitted provided that the following conditions are met: #pragma pack(1) - -/// -/// Azalia Header structure -/// -typedef struct { - UINT16 VendorId; ///< Codec Vendor ID - UINT16 DeviceId; ///< Codec Device ID - UINT8 RevisionId; ///< Revision ID of the codec. 0xFF matches any revision. - UINT8 SdiNum; ///< SDI number, 0xFF matches any SDI. - UINT16 DataDwords; ///< Number of data DWORDs pointed by the codec data buffer. - UINT32 Reserved; ///< Reserved for future use. Must be set to 0. -} AZALIA_HEADER; - -/// -/// Audio Azalia Verb Table structure -/// -typedef struct { - AZALIA_HEADER Header; ///< AZALIA PCH header - UINT32 *Data; ///< Pointer to the data buffer. Its length is specified in the header -} AUDIO_AZALIA_VERB_TABLE; - -/// -/// Refer to the definition of PCH_INT_PIN -/// -typedef enum { - SiPchNoInt, ///< No Interrupt Pin - SiPchIntA, - SiPchIntB, - SiPchIntC, - SiPchIntD -} SI_PCH_INT_PIN; -/// -/// The PCH_DEVICE_INTERRUPT_CONFIG block describes interrupt pin, IRQ and interrupt mode for PCH device. -/// -typedef struct { - UINT8 Device; ///< Device number - UINT8 Function; ///< Device function - UINT8 IntX; ///< Interrupt pin: INTA-INTD (see SI_PCH_INT_PIN) - UINT8 Irq; ///< IRQ to be set for device. -} SI_PCH_DEVICE_INTERRUPT_CONFIG; - -#define SI_PCH_MAX_DEVICE_INTERRUPT_CONFIG 64 ///< Number of all PCH devices - + +/// +/// Azalia Header structure +/// +typedef struct { + UINT16 VendorId; ///< Codec Vendor ID + UINT16 DeviceId; ///< Codec Device ID + UINT8 RevisionId; ///< Revision ID of the codec. 0xFF matches any revision. + UINT8 SdiNum; ///< SDI number, 0xFF matches any SDI. + UINT16 DataDwords; ///< Number of data DWORDs pointed by the codec data buffer. + UINT32 Reserved; ///< Reserved for future use. Must be set to 0. +} AZALIA_HEADER; + +/// +/// Audio Azalia Verb Table structure +/// +typedef struct { + AZALIA_HEADER Header; ///< AZALIA PCH header + UINT32 *Data; ///< Pointer to the data buffer. Its length is specified in the header +} AUDIO_AZALIA_VERB_TABLE; + +/// +/// Refer to the definition of PCH_INT_PIN +/// +typedef enum { + SiPchNoInt, ///< No Interrupt Pin + SiPchIntA, + SiPchIntB, + SiPchIntC, + SiPchIntD +} SI_PCH_INT_PIN; +/// +/// The PCH_DEVICE_INTERRUPT_CONFIG block describes interrupt pin, IRQ and interrupt mode for PCH device. +/// +typedef struct { + UINT8 Device; ///< Device number + UINT8 Function; ///< Device function + UINT8 IntX; ///< Interrupt pin: INTA-INTD (see SI_PCH_INT_PIN) + UINT8 Irq; ///< IRQ to be set for device. +} SI_PCH_DEVICE_INTERRUPT_CONFIG; + +#define SI_PCH_MAX_DEVICE_INTERRUPT_CONFIG 64 ///< Number of all PCH devices + /** Fsp S Configuration **/ @@ -3621,7 +3621,17 @@ typedef struct { **/ UINT32 SdCardRxCmdDataDelay2RegValue; -/** Offset 0x0ABC +/** Offset 0x0ABC - Enforce Enhanced Debug Mode + Determine if ME should enter Enhanced Debug Mode. 0: disable, 1: enable + $EN_DIS +**/ + UINT8 EnforceEDebugMode; + +/** Offset 0x0ABD +**/ + UINT8 UnusedUpdSpace31[7]; + +/** Offset 0x0AC4 **/ UINT8 ReservedFspsTestUpd[12]; } FSP_S_TEST_CONFIG; @@ -3642,11 +3652,11 @@ typedef struct { **/ FSP_S_TEST_CONFIG FspsTestConfig; -/** Offset 0x0AC8 +/** Offset 0x0AD0 **/ - UINT8 UnusedUpdSpace31[6]; + UINT8 UnusedUpdSpace32[6]; -/** Offset 0x0ACE +/** Offset 0x0AD6 **/ UINT16 UpdTerminator; } FSPS_UPD; -- cgit v1.2.3