From 18a40e05334b650d8104787416afd8ba87f03987 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Fri, 4 Apr 2014 11:59:48 -0600 Subject: Update vendorcode/intel/makefile for coming FSPs Other FSPs have more than just the initial fsphob.c source file. Add any .c files in the srx directory to the ramstage build. Change-Id: I5118bdcca44935b579809c4fc9566ab7914a6e4b Signed-off-by: Martin Roth Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/5454 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Aaron Durbin Reviewed-by: Alexandru Gagniuc --- src/vendorcode/intel/Makefile.inc | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'src/vendorcode/intel') diff --git a/src/vendorcode/intel/Makefile.inc b/src/vendorcode/intel/Makefile.inc index b05838f52a..8569af03ce 100644 --- a/src/vendorcode/intel/Makefile.inc +++ b/src/vendorcode/intel/Makefile.inc @@ -1,7 +1,7 @@ ## ## This file is part of the coreboot project. ## -## Copyright (C) 2013 Sage Electronic Engineering, LLC. +## Copyright (C) 2013-2014 Sage Electronic Engineering, LLC. ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -17,8 +17,11 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -ifneq ($(CONFIG_FSP_VENDORCODE_HEADER_PATH),) +ifneq ($(CONFIG_FSP_VENDORCODE_HEADER_PATH),) FSP_PATH := $(call strip_quotes,$(CONFIG_FSP_VENDORCODE_HEADER_PATH)) -ramstage-y += $(FSP_PATH)srx/fsphob.c +FSP_SRC_FILES := $(wildcard src/vendorcode/intel/$(FSP_PATH)srx/*.c) +FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), $(FSP_PATH)srx/$(notdir $(file))) +ramstage-y += $(FSP_C_INPUTS) + CC := $(CC) -Isrc/vendorcode/intel/$(FSP_PATH)include -endif \ No newline at end of file +endif -- cgit v1.2.3