From bd55c02a2398e2ce95cb06ff9f1e3fb1c20d0ab8 Mon Sep 17 00:00:00 2001
From: Balaji Manigandan B <balaji.manigandan@intel.com>
Date: Fri, 22 Sep 2017 14:27:56 +0530
Subject: vendor/intel/skykabylake: Update FSP header files to version 2.7.2

Update FSP header files to version 2.7.2.

New UPDs added
	FspmUpd.h:
	 *CleanMemory

	FspsUpd.h:
	 *IslVrCmd
	 *ThreeStrikeCounterDisable

Structure member names used to specify memory configuration
to MRC have been updated, SoC side romstage code is updated
to handle this change.

CQ-DEPEND=CL:*460573,CL:*460612,CL:*460592
BUG=b:65499724
BRANCH=None
TEST= Build and boot soraka, basic sanity check and suspend resume checks.

Change-Id: Ia4eca011bc9a3b1a50e49d6d86a09d05a0cbf151
Signed-off-by: Balaji Manigandan B <balaji.manigandan@intel.com>
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/21679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
---
 src/vendorcode/intel/fsp/fsp2_0/skykabylake/FspmUpd.h | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

(limited to 'src/vendorcode/intel/fsp/fsp2_0/skykabylake/FspmUpd.h')

diff --git a/src/vendorcode/intel/fsp/fsp2_0/skykabylake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/skykabylake/FspmUpd.h
index 1916e4e1c0..f3aa4c85c6 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/skykabylake/FspmUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/skykabylake/FspmUpd.h
@@ -844,7 +844,7 @@ typedef struct {
 
 /** Offset 0x02E3 - Ring Downbin
   Ring Downbin enable/disable. When enabled, CPU will ensure the ring ratio is always
-  lower than the core ratio.<b>0: Disable</b>; 1: Enable.
+  lower than the core ratio. 0: Disable; <b>1: Enable.</b>
   $EN_DIS
 **/
   UINT8                       RingDownBin;
@@ -1255,9 +1255,15 @@ typedef struct {
 **/
   UINT8                       Avx3RatioOffset;
 
-/** Offset 0x051B
+/** Offset 0x051B - Ask MRC to clear memory content
+  Ask MRC to clear memory content <b>0: Do not Clear Memory;</b> 1: Clear Memory.
+  $EN_DIS
+**/
+  UINT8                       CleanMemory;
+
+/** Offset 0x051C
 **/
-  UINT8                       ReservedFspmUpd[5];
+  UINT8                       ReservedFspmUpd[4];
 } FSP_M_CONFIG;
 
 /** Fsp M Test Configuration
-- 
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