From 6d27778973edf6bdebfa812eac8893d52961a891 Mon Sep 17 00:00:00 2001 From: Jonathan Zhang Date: Tue, 9 Jun 2020 17:56:53 -0700 Subject: vendorcode/intel: Add edk2-stable202005 support This patch includes (edk2/edk2-stable202005) all required headers for edk2-stable202005 quarterly EDK2 tag from EDK2 github project using below command: >> git clone https://github.com/tianocore/edk2.git vedk2-stable202005 Only include necessary header files. MdePkg/Include/Base.h was updated to avoid compilation errors through safeguarding definitions for MIN, MAX, NULL, ABS, ARRAY_SIZE. Signed-off-by: Jonathan Zhang Change-Id: I3172505d9b829647ee1208c87623172f10b39310 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42239 Reviewed-by: Angel Pons Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- .../MdePkg/Include/Register/Amd/Fam17Msr.h | 56 ++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Register/Amd/Fam17Msr.h (limited to 'src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Register/Amd/Fam17Msr.h') diff --git a/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Register/Amd/Fam17Msr.h b/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Register/Amd/Fam17Msr.h new file mode 100644 index 0000000000..4325477eef --- /dev/null +++ b/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Register/Amd/Fam17Msr.h @@ -0,0 +1,56 @@ +/** @file + MSR Definitions. + + Provides defines for Machine Specific Registers(MSR) indexes. Data structures + are provided for MSRs that contain one or more bit fields. If the MSR value + returned is a single 32-bit or 64-bit value, then a data structure is not + provided for that MSR. + + Copyright (c) 2017, Advanced Micro Devices. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference: + AMD64 Architecture Programming Manual volume 2, March 2017, Sections 15.34 + +**/ + +#ifndef __FAM17_MSR_H__ +#define __FAM17_MSR_H__ + +/** + Secure Encrypted Virtualization (SEV) status register + +**/ +#define MSR_SEV_STATUS 0xc0010131 + +/** + MSR information returned for #MSR_SEV_STATUS +**/ +typedef union { + /// + /// Individual bit fields + /// + struct { + /// + /// [Bit 0] Secure Encrypted Virtualization (Sev) is enabled + /// + UINT32 SevBit:1; + + /// + /// [Bit 1] Secure Encrypted Virtualization Encrypted State (SevEs) is enabled + /// + UINT32 SevEsBit:1; + + UINT32 Reserved:30; + } Bits; + /// + /// All bit fields as a 32-bit value + /// + UINT32 Uint32; + /// + /// All bit fields as a 64-bit value + /// + UINT64 Uint64; +} MSR_SEV_STATUS_REGISTER; + +#endif -- cgit v1.2.3