From 6d27778973edf6bdebfa812eac8893d52961a891 Mon Sep 17 00:00:00 2001 From: Jonathan Zhang Date: Tue, 9 Jun 2020 17:56:53 -0700 Subject: vendorcode/intel: Add edk2-stable202005 support This patch includes (edk2/edk2-stable202005) all required headers for edk2-stable202005 quarterly EDK2 tag from EDK2 github project using below command: >> git clone https://github.com/tianocore/edk2.git vedk2-stable202005 Only include necessary header files. MdePkg/Include/Base.h was updated to avoid compilation errors through safeguarding definitions for MIN, MAX, NULL, ABS, ARRAY_SIZE. Signed-off-by: Jonathan Zhang Change-Id: I3172505d9b829647ee1208c87623172f10b39310 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42239 Reviewed-by: Angel Pons Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- .../MdePkg/Include/Protocol/SmmControl2.h | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Protocol/SmmControl2.h (limited to 'src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Protocol/SmmControl2.h') diff --git a/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Protocol/SmmControl2.h b/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Protocol/SmmControl2.h new file mode 100644 index 0000000000..d75efeed42 --- /dev/null +++ b/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Protocol/SmmControl2.h @@ -0,0 +1,35 @@ +/** @file + EFI SMM Control2 Protocol as defined in the PI 1.2 specification. + + This protocol is used initiate synchronous SMI activations. This protocol could be published by a + processor driver to abstract the SMI IPI or a driver which abstracts the ASIC that is supporting the + APM port. Because of the possibility of performing SMI IPI transactions, the ability to generate this + event from a platform chipset agent is an optional capability for both IA-32 and x64-based systems. + + The EFI_SMM_CONTROL2_PROTOCOL is produced by a runtime driver. It provides an + abstraction of the platform hardware that generates an SMI. There are often I/O ports that, when + accessed, will generate the SMI. Also, the hardware optionally supports the periodic generation of + these signals. + + Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef _SMM_CONTROL2_H_ +#define _SMM_CONTROL2_H_ + +#include + +#define EFI_SMM_CONTROL2_PROTOCOL_GUID EFI_MM_CONTROL_PROTOCOL_GUID + +typedef EFI_MM_CONTROL_PROTOCOL EFI_SMM_CONTROL2_PROTOCOL; +typedef EFI_MM_PERIOD EFI_SMM_PERIOD; + +typedef EFI_MM_ACTIVATE EFI_SMM_ACTIVATE2; + +typedef EFI_MM_DEACTIVATE EFI_SMM_DEACTIVATE2; +extern EFI_GUID gEfiSmmControl2ProtocolGuid; + +#endif + -- cgit v1.2.3