From 7bbe3bb9f0caf518af89bc18b99cd9ac32ceff3f Mon Sep 17 00:00:00 2001 From: Peter Lemenkov Date: Fri, 7 Dec 2018 11:23:21 +0100 Subject: vendorcode/{amd,cavium,intel}: Remove trailing whitespace find src -type f "!" -regex ".*\.\(vbt\|bin\)" -exec sed -i -e "s,\s\+$,,g" {} \; Change-Id: Ic70cf8524dcd0a0f5700f91b704b3c545dd8a01a Signed-off-by: Peter Lemenkov Reviewed-on: https://review.coreboot.org/c/30959 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- .../UDK2017/MdePkg/Include/Library/PciExpressLib.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PciExpressLib.h') diff --git a/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PciExpressLib.h b/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PciExpressLib.h index 445677f72f..7fa5e763d6 100644 --- a/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PciExpressLib.h +++ b/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PciExpressLib.h @@ -1,7 +1,7 @@ /** @file Provides services to access PCI Configuration Space using the MMIO PCI Express window. - - This library is identical to the PCI Library, except the access method for performing PCI + + This library is identical to the PCI Library, except the access method for performing PCI configuration cycles must be through the 256 MB PCI Express MMIO window whose base address is defined by PcdPciExpressBaseAddress. @@ -40,20 +40,20 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #define PCI_EXPRESS_LIB_ADDRESS(Bus,Device,Function,Offset) PCI_ECAM_ADDRESS ((Bus), (Device), (Function), (Offset)) /** - Registers a PCI device so PCI configuration registers may be accessed after + Registers a PCI device so PCI configuration registers may be accessed after SetVirtualAddressMap(). - - Registers the PCI device specified by Address so all the PCI configuration - registers associated with that PCI device may be accessed after SetVirtualAddressMap() + + Registers the PCI device specified by Address so all the PCI configuration + registers associated with that PCI device may be accessed after SetVirtualAddressMap() is called. - + If Address > 0x0FFFFFFF, then ASSERT(). @param Address Address that encodes the PCI Bus, Device, Function and Register. - + @retval RETURN_SUCCESS The PCI device was registered for runtime access. - @retval RETURN_UNSUPPORTED An attempt was made to call this function + @retval RETURN_UNSUPPORTED An attempt was made to call this function after ExitBootServices(). @retval RETURN_UNSUPPORTED The resources required to access the PCI device at runtime could not be mapped. -- cgit v1.2.3