From b0f81518b5c17466bc95ebdef292e82c4b76bc88 Mon Sep 17 00:00:00 2001
From: Aaron Durbin <adurbin@chromium.org>
Date: Mon, 25 Jul 2016 21:31:41 -0500
Subject: chromeos mainboards: remove chromeos.asl

Use the ACPI generator for creating the Chrome OS gpio
package. Each mainboard has its own list of Chrome OS
gpios that are fed into a helper to generate the ACPI
external OIPG package.  Additionally, the common
chromeos.asl is now conditionally included based on
CONFIG_CHROMEOS.

Change-Id: I1d3d951964374a9d43521879d4c265fa513920d2
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15909
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
---
 src/vendorcode/google/chromeos/chromeos.h | 72 +++++++++++++++++++++++++++++++
 1 file changed, 72 insertions(+)

(limited to 'src/vendorcode/google/chromeos/chromeos.h')

diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h
index 0a93ccd307..fd845bfae1 100644
--- a/src/vendorcode/google/chromeos/chromeos.h
+++ b/src/vendorcode/google/chromeos/chromeos.h
@@ -19,6 +19,7 @@
 #include <stddef.h>
 #include <stdint.h>
 #include <bootmode.h>
+#include <device/device.h>
 #include <rules.h>
 #include <vboot/misc.h>
 #include <vboot/vboot_common.h>
@@ -53,4 +54,75 @@ static inline void chromeos_reserve_ram_oops(struct device *dev, int idx) {}
 
 void cbmem_add_vpd_calibration_data(void);
 
+/*
+ * Create the OIPG package containing the Chrome OS gpios described by
+ * the chromeos_gpio array.
+ */
+struct cros_gpio;
+void chromeos_acpi_gpio_generate(const struct cros_gpio *gpios, size_t num);
+
+/*
+ * Common helper function and delcarations for mainboards to use to generate
+ * ACPI-specific Chrome OS needs.
+ */
+void mainboard_chromeos_acpi_generate(void);
+#if IS_ENABLED(CONFIG_CHROMEOS)
+void chromeos_dsdt_generator(struct device *dev);
+#else
+#define chromeos_dsdt_generator DEVICE_NOOP
+#endif
+
+enum {
+	CROS_GPIO_REC = 1, /* Recovery */
+	CROS_GPIO_DEV = 2, /* Developer */
+	CROS_GPIO_WP = 3, /* Write Protect */
+
+	CROS_GPIO_ACTIVE_LOW = 0,
+	CROS_GPIO_ACTIVE_HIGH = 1,
+
+	CROS_GPIO_VIRTUAL = -1,
+};
+
+struct cros_gpio {
+	int type;
+	int polarity;
+	int gpio_num;
+	const char *device;
+};
+
+#define CROS_GPIO_INITIALIZER(typ, pol, num, dev) \
+	{				\
+		.type = (typ),		\
+		.polarity = (pol),	\
+		.gpio_num = (num),	\
+		.device = (dev),	\
+	}
+
+#define CROS_GPIO_REC_INITIALIZER(pol, num, dev) \
+	CROS_GPIO_INITIALIZER(CROS_GPIO_REC, pol, num, dev)
+
+#define CROS_GPIO_REC_AL(num, dev) \
+	CROS_GPIO_REC_INITIALIZER(CROS_GPIO_ACTIVE_LOW, num, dev)
+
+#define CROS_GPIO_REC_AH(num, dev) \
+	CROS_GPIO_REC_INITIALIZER(CROS_GPIO_ACTIVE_HIGH, num, dev)
+
+#define CROS_GPIO_DEV_INITIALIZER(pol, num, dev) \
+	CROS_GPIO_INITIALIZER(CROS_GPIO_DEV, pol, num, dev)
+
+#define CROS_GPIO_DEV_AL(num, dev) \
+	CROS_GPIO_DEV_INITIALIZER(CROS_GPIO_ACTIVE_LOW, num, dev)
+
+#define CROS_GPIO_DEV_AH(num, dev) \
+	CROS_GPIO_DEV_INITIALIZER(CROS_GPIO_ACTIVE_HIGH, num, dev)
+
+#define CROS_GPIO_WP_INITIALIZER(pol, num, dev) \
+	CROS_GPIO_INITIALIZER(CROS_GPIO_WP, pol, num, dev)
+
+#define CROS_GPIO_WP_AL(num, dev) \
+	CROS_GPIO_WP_INITIALIZER(CROS_GPIO_ACTIVE_LOW, num, dev)
+
+#define CROS_GPIO_WP_AH(num, dev) \
+	CROS_GPIO_WP_INITIALIZER(CROS_GPIO_ACTIVE_HIGH, num, dev)
+
 #endif /* __CHROMEOS_H__ */
-- 
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