From 2531865f137fed1254c7d6702904b37a537884a4 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 12 Jul 2018 13:05:01 +0200 Subject: cavium/bdk: Read DDR freq from memory controller The BDK config subsystem can't store values in romstage. Read frequency from DDR memory controller instead from BDK config. Fixes memory info showing always 0 MT/s. Change-Id: Iaee33e57e27ca182f41be923cf950868f66d3638 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/27451 Reviewed-by: Philipp Deppenwiese Tested-by: build bot (Jenkins) --- src/vendorcode/cavium/bdk/libbdk-dram/bdk-dram-config.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/vendorcode/cavium') diff --git a/src/vendorcode/cavium/bdk/libbdk-dram/bdk-dram-config.c b/src/vendorcode/cavium/bdk/libbdk-dram/bdk-dram-config.c index 5c104231dc..2ec7a1aaac 100644 --- a/src/vendorcode/cavium/bdk/libbdk-dram/bdk-dram-config.c +++ b/src/vendorcode/cavium/bdk/libbdk-dram/bdk-dram-config.c @@ -106,7 +106,7 @@ const char* bdk_dram_get_info_string(int node) snprintf(info_string, INFO_STRING_LEN, " %ld MB, %ld MT/s, %s %s", bdk_dram_get_size_mbytes(node), - bdk_config_get_int(BDK_CONFIG_DDR_SPEED, node), + libdram_get_freq_from_pll(node, 0) / 1000000, (__bdk_dram_is_ddr4(node, 0)) ? "DDR4" : "DDR3", (__bdk_dram_is_rdimm(node, 0)) ? "RDIMM" : "UDIMM"); -- cgit v1.2.3