From d229d4a28e6f398563a4f43035a63d5344ca7f4e Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sun, 24 Sep 2017 11:36:30 +0300 Subject: AGESA cimx: Move cb_types.h to vendorcode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This file mostly mimics Porting.h and should be removed. For now, move it and use it consistently with incorrect form as #include "cbtypes.h". Change-Id: Ifaee2694f9f33a4da6e780b03d41bdfab9e2813e Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/21663 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/vendorcode/amd/cimx/rd890/Makefile.inc | 2 - src/vendorcode/amd/cimx/sb700/Makefile.inc | 2 - src/vendorcode/amd/cimx/sb800/AMDSBLIB.h | 2 +- src/vendorcode/amd/cimx/sb800/Makefile.inc | 2 - src/vendorcode/amd/cimx/sb900/Makefile.inc | 2 - src/vendorcode/amd/cimx/sb900/SbSubFun.h | 2 +- src/vendorcode/amd/include/cbtypes.h | 66 ++++++++++++++++++++++++++++++ 7 files changed, 68 insertions(+), 10 deletions(-) create mode 100644 src/vendorcode/amd/include/cbtypes.h (limited to 'src/vendorcode/amd') diff --git a/src/vendorcode/amd/cimx/rd890/Makefile.inc b/src/vendorcode/amd/cimx/rd890/Makefile.inc index 670d26c5e8..c0e3534047 100644 --- a/src/vendorcode/amd/cimx/rd890/Makefile.inc +++ b/src/vendorcode/amd/cimx/rd890/Makefile.inc @@ -28,11 +28,9 @@ #***************************************************************************** CPPFLAGS_x86_32 += -I$(src)/northbridge/amd/cimx/rd890 -CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/rd890 CPPFLAGS_x86_64 += -I$(src)/northbridge/amd/cimx/rd890 -CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/rd890 romstage-y += amdAcpiIvrs.c diff --git a/src/vendorcode/amd/cimx/sb700/Makefile.inc b/src/vendorcode/amd/cimx/sb700/Makefile.inc index 1d7ccd1494..b96fbb8b1a 100644 --- a/src/vendorcode/amd/cimx/sb700/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb700/Makefile.inc @@ -28,11 +28,9 @@ #***************************************************************************** CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb700 -CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb700 CPPFLAGS_x86_64 += -I$(src)/southbridge/amd/cimx/sb700 -CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/sb700 romstage-y += ACPILIB.c diff --git a/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h b/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h index a50cda4427..3b09dac71c 100644 --- a/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h +++ b/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h @@ -46,7 +46,7 @@ #ifndef __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__ #define __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__ -#include +#include "cbtypes.h" //AMDSBLIB Routines diff --git a/src/vendorcode/amd/cimx/sb800/Makefile.inc b/src/vendorcode/amd/cimx/sb800/Makefile.inc index d7cf136e11..86a51f77f9 100644 --- a/src/vendorcode/amd/cimx/sb800/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb800/Makefile.inc @@ -14,11 +14,9 @@ # CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb800 -CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb800 CPPFLAGS_x86_64 += -I$(src)/southbridge/amd/cimx/sb800 -CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/sb800 romstage-y += ACPILIB.c diff --git a/src/vendorcode/amd/cimx/sb900/Makefile.inc b/src/vendorcode/amd/cimx/sb900/Makefile.inc index f82e674c84..0c62cdde14 100644 --- a/src/vendorcode/amd/cimx/sb900/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb900/Makefile.inc @@ -14,11 +14,9 @@ # CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb900 -CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb900 CPPFLAGS_x86_64 += -I$(src)/southbridge/amd/cimx/sb900 -CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/sb900 romstage-y += AcpiLib.c diff --git a/src/vendorcode/amd/cimx/sb900/SbSubFun.h b/src/vendorcode/amd/cimx/sb900/SbSubFun.h index 68574a77dc..41ce7b7a9a 100644 --- a/src/vendorcode/amd/cimx/sb900/SbSubFun.h +++ b/src/vendorcode/amd/cimx/sb900/SbSubFun.h @@ -40,7 +40,7 @@ ; ;*********************************************************************************/ -#include +#include "cbtypes.h" // Southbridge SBMAIN Routines /** diff --git a/src/vendorcode/amd/include/cbtypes.h b/src/vendorcode/amd/include/cbtypes.h new file mode 100644 index 0000000000..4a6765d411 --- /dev/null +++ b/src/vendorcode/amd/include/cbtypes.h @@ -0,0 +1,66 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CBTYPES_H_ +#define _CBTYPES_H_ + +/* Map coreboot stdint types to AGESA types. */ + +#include + +typedef int64_t __int64; +typedef void VOID; +typedef uintptr_t UINTN; +typedef char CHAR8; +typedef uint8_t UINT8; +typedef uint16_t UINT16; +typedef uint32_t UINT32; +typedef int32_t INT32; +typedef uint64_t UINT64; +typedef uint8_t BOOLEAN; + +#define DMSG_SB_TRACE 0x02 +#define TRACE(Arguments) + +#ifndef TRUE +#define TRUE 1 +#endif +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef VOLATILE +#define VOLATILE volatile +#endif +#ifndef CONST +#define CONST const +#endif + +#ifndef IN +#define IN +#endif +#ifndef OUT +#define OUT +#endif + + +#ifndef STATIC +#define STATIC static +#endif +#ifndef VOLATILE +#define VOLATILE volatile +#endif + +#endif -- cgit v1.2.3