From cd7578030b77fd7f2957338285c76f8cbe0b0422 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 29 Jul 2017 14:11:03 +0300 Subject: AGESA f14: Sacrifice ACPI S3 support for EARLY_CBMEM_INIT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit A decision has been made that boards with LATE_CBMEM_INIT will be dropped from coreboot master starting with next release scheduled for October 2017. As existing implementation of CAR teardown in AGESA can only do either EARLY_CBMEM_INIT or ACPI S3 support, choose the former. ACPI S3 support may be brought back at a later date for these platforms but that requires fair amount of work fixing the MTRR issues causing low-memory corruptions. Change-Id: I5d21cf6cbe02ded67566d37651c2062b436739a3 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/20898 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Martin Roth --- src/vendorcode/amd/agesa/f12/gcccar.inc | 16 +++++++++++++++- src/vendorcode/amd/agesa/f14/gcccar.inc | 16 +++++++++++++++- 2 files changed, 30 insertions(+), 2 deletions(-) (limited to 'src/vendorcode/amd') diff --git a/src/vendorcode/amd/agesa/f12/gcccar.inc b/src/vendorcode/amd/agesa/f12/gcccar.inc index 6a8045198d..6a81fc7add 100644 --- a/src/vendorcode/amd/agesa/f12/gcccar.inc +++ b/src/vendorcode/amd/agesa/f12/gcccar.inc @@ -611,6 +611,13 @@ fam12_enable_stack_hook_exit: * Return any family specific controls to their 'standard' * settings for using cache with main memory. * +* Note: Customized for coreboot: +* A wbinvd is used to send cache to memory. The existing stack is preserved +* at its original location and additional information is preserved (e.g. +* coreboot CAR globals, heap structures, etc.). This implementation should +* NOT be used with S3 resume IF the stack/cache area is not reserved and +* over system memory. +* * Inputs: * ESI - [31:24] flags; [15,8]= Node#; [7,0]= core# * Outputs: @@ -665,7 +672,14 @@ fam12_enable_stack_hook_exit: mov %ax, %bx # Save INVD -> WBINVD bit btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion _WRMSR - invd # Clear the cache tag RAMs + + #-------------------------------------------------------------------------- + # Send cache to memory. Preserve stack and coreboot CAR globals. + # This shouldn't be used with S3 resume IF the stack/cache area is + # not reserved and over system memory. + #-------------------------------------------------------------------------- + wbinvd + mov %bx, %ax # Restore INVD -> WBINVD bit _WRMSR diff --git a/src/vendorcode/amd/agesa/f14/gcccar.inc b/src/vendorcode/amd/agesa/f14/gcccar.inc index 95dd74d6cb..10214a8f03 100644 --- a/src/vendorcode/amd/agesa/f14/gcccar.inc +++ b/src/vendorcode/amd/agesa/f14/gcccar.inc @@ -770,6 +770,13 @@ fam14_enable_stack_hook_exit: * Return any family specific controls to their 'standard' * settings for using cache with main memory. * +* Note: Customized for coreboot: +* A wbinvd is used to send cache to memory. The existing stack is preserved +* at its original location and additional information is preserved (e.g. +* coreboot CAR globals, heap structures, etc.). This implementation should +* NOT be used with S3 resume IF the stack/cache area is not reserved and +* over system memory. +* * Inputs: * ESI - [31:24] flags; [15,8]= Node#; [7,0]= core# * Outputs: @@ -813,7 +820,14 @@ fam14_enable_stack_hook_exit: _RDMSR btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion _WRMSR - invd # Clear the cache tag RAMs + + #-------------------------------------------------------------------------- + # Send cache to memory. Preserve stack and coreboot CAR globals. + # This shouldn't be used with S3 resume IF the stack/cache area is + # not reserved and over system memory. + #-------------------------------------------------------------------------- + wbinvd + bts $INVD_WBINVD, %eax # Turn on Conversion of INVD to WBINVD _WRMSR -- cgit v1.2.3