From a19d98647b0b1862c28b362505b30f4551b2fe2c Mon Sep 17 00:00:00 2001 From: Felix Held Date: Mon, 20 Jul 2020 15:46:56 +0200 Subject: vc/amd/fsp/picasso: add logical to lane number in port descriptor struct The lane numbers in the PCIe/DXIO descriptor are the logical and not the physical ones, so add logical to the corresponding field names of the fsp_pcie_descriptor struct. Change-Id: I7037fed225119218e87593932815aff815e83ff8 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/43660 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/vendorcode/amd/fsp/picasso/platform_descriptors.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/vendorcode/amd') diff --git a/src/vendorcode/amd/fsp/picasso/platform_descriptors.h b/src/vendorcode/amd/fsp/picasso/platform_descriptors.h index 9765ea6f2e..acf821b6e2 100644 --- a/src/vendorcode/amd/fsp/picasso/platform_descriptors.h +++ b/src/vendorcode/amd/fsp/picasso/platform_descriptors.h @@ -113,8 +113,8 @@ typedef struct __packed { /* Beware that the lane numbers in here are the logical and not the physical lane numbers! */ typedef struct __packed { uint8_t engine_type; - uint8_t start_lane; // Start lane of the pci device - uint8_t end_lane; // End lane of the pci device + uint8_t start_logical_lane; // Start lane of the pci device + uint8_t end_logical_lane; // End lane of the pci device uint8_t gpio_group_id; // FCH reset number. 0 is global reset uint32_t port_present :1; // Should be TRUE if train link uint32_t reserved_3 :7; -- cgit v1.2.3