From 054b84294ef5e66c9ade39bccb14f6627bed24c2 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Thu, 25 Jan 2024 19:43:35 +0100 Subject: vc/amd: move verstage on PSP files to new psp_verstage folder Move the verstage on PSP files in vendorcode from the fsp subdirectory to a new psp_verstage subdirectory, since those files aren't specific to the case of the FSP being used for the silicon initialization. Signed-off-by: Felix Held Change-Id: Ic47f8b18bc515600add7838f4c7afcb4fff7c004 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80209 Reviewed-by: Matt DeVillier Reviewed-by: Varshit Pandya Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson --- .../amd/fsp/cezanne/bl_uapp/bl_uapp_end.S | 44 --- .../amd/fsp/cezanne/bl_uapp/bl_uapp_header.inc | 64 --- .../amd/fsp/cezanne/bl_uapp/bl_uapp_startup.S | 71 ---- .../cezanne/include/bl_uapp/bl_errorcodes_public.h | 37 -- .../cezanne/include/bl_uapp/bl_syscall_public.h | 349 ----------------- .../amd/fsp/common/bl_uapp/bl_uapp_end.S | 44 --- .../amd/fsp/common/bl_uapp/bl_uapp_header.inc | 64 --- .../amd/fsp/common/bl_uapp/bl_uapp_startup.S | 71 ---- .../common/include/bl_uapp/bl_errorcodes_public.h | 37 -- .../fsp/glinda/include/bl_uapp/bl_syscall_public.h | 377 ------------------ .../amd/fsp/mendocino/bl_uapp/bl_uapp_end.S | 44 --- .../amd/fsp/mendocino/bl_uapp/bl_uapp_header.inc | 64 --- .../amd/fsp/mendocino/bl_uapp/bl_uapp_startup.S | 71 ---- .../include/bl_uapp/bl_errorcodes_public.h | 37 -- .../mendocino/include/bl_uapp/bl_syscall_public.h | 396 ------------------- .../phoenix/include/bl_uapp/bl_syscall_public.h | 428 --------------------- .../amd/fsp/picasso/bl_uapp/bl_uapp_end.S | 44 --- .../amd/fsp/picasso/bl_uapp/bl_uapp_header.inc | 64 --- .../amd/fsp/picasso/bl_uapp/bl_uapp_startup.S | 105 ----- .../picasso/include/bl_uapp/bl_errorcodes_public.h | 80 ---- .../picasso/include/bl_uapp/bl_syscall_public.h | 416 -------------------- .../amd/psp_verstage/cezanne/bl_uapp/bl_uapp_end.S | 44 +++ .../cezanne/bl_uapp/bl_uapp_header.inc | 64 +++ .../psp_verstage/cezanne/bl_uapp/bl_uapp_startup.S | 71 ++++ .../cezanne/include/bl_uapp/bl_errorcodes_public.h | 37 ++ .../cezanne/include/bl_uapp/bl_syscall_public.h | 349 +++++++++++++++++ .../amd/psp_verstage/common/bl_uapp/bl_uapp_end.S | 44 +++ .../psp_verstage/common/bl_uapp/bl_uapp_header.inc | 64 +++ .../psp_verstage/common/bl_uapp/bl_uapp_startup.S | 71 ++++ .../common/include/bl_uapp/bl_errorcodes_public.h | 37 ++ .../glinda/include/bl_uapp/bl_syscall_public.h | 377 ++++++++++++++++++ .../psp_verstage/mendocino/bl_uapp/bl_uapp_end.S | 44 +++ .../mendocino/bl_uapp/bl_uapp_header.inc | 64 +++ .../mendocino/bl_uapp/bl_uapp_startup.S | 71 ++++ .../include/bl_uapp/bl_errorcodes_public.h | 37 ++ .../mendocino/include/bl_uapp/bl_syscall_public.h | 396 +++++++++++++++++++ .../phoenix/include/bl_uapp/bl_syscall_public.h | 428 +++++++++++++++++++++ .../amd/psp_verstage/picasso/bl_uapp/bl_uapp_end.S | 44 +++ .../picasso/bl_uapp/bl_uapp_header.inc | 64 +++ .../psp_verstage/picasso/bl_uapp/bl_uapp_startup.S | 105 +++++ .../picasso/include/bl_uapp/bl_errorcodes_public.h | 80 ++++ .../picasso/include/bl_uapp/bl_syscall_public.h | 416 ++++++++++++++++++++ 42 files changed, 2907 insertions(+), 2907 deletions(-) delete mode 100644 src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S delete mode 100644 src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_header.inc delete mode 100644 src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_startup.S delete mode 100644 src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_errorcodes_public.h delete mode 100644 src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h delete mode 100644 src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S delete mode 100644 src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_header.inc delete mode 100644 src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_startup.S delete mode 100644 src/vendorcode/amd/fsp/common/include/bl_uapp/bl_errorcodes_public.h delete mode 100644 src/vendorcode/amd/fsp/glinda/include/bl_uapp/bl_syscall_public.h delete mode 100644 src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S delete mode 100644 src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_header.inc delete mode 100644 src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_startup.S delete mode 100644 src/vendorcode/amd/fsp/mendocino/include/bl_uapp/bl_errorcodes_public.h delete mode 100644 src/vendorcode/amd/fsp/mendocino/include/bl_uapp/bl_syscall_public.h delete mode 100644 src/vendorcode/amd/fsp/phoenix/include/bl_uapp/bl_syscall_public.h delete mode 100644 src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S delete mode 100644 src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_header.inc delete mode 100644 src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S delete mode 100644 src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h delete mode 100644 src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_syscall_public.h create mode 100644 src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_end.S create mode 100644 src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_header.inc create mode 100644 src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_startup.S create mode 100644 src/vendorcode/amd/psp_verstage/cezanne/include/bl_uapp/bl_errorcodes_public.h create mode 100644 src/vendorcode/amd/psp_verstage/cezanne/include/bl_uapp/bl_syscall_public.h create mode 100644 src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_end.S create mode 100644 src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_header.inc create mode 100644 src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_startup.S create mode 100644 src/vendorcode/amd/psp_verstage/common/include/bl_uapp/bl_errorcodes_public.h create mode 100644 src/vendorcode/amd/psp_verstage/glinda/include/bl_uapp/bl_syscall_public.h create mode 100644 src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_end.S create mode 100644 src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_header.inc create mode 100644 src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_startup.S create mode 100644 src/vendorcode/amd/psp_verstage/mendocino/include/bl_uapp/bl_errorcodes_public.h create mode 100644 src/vendorcode/amd/psp_verstage/mendocino/include/bl_uapp/bl_syscall_public.h create mode 100644 src/vendorcode/amd/psp_verstage/phoenix/include/bl_uapp/bl_syscall_public.h create mode 100644 src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_end.S create mode 100644 src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_header.inc create mode 100644 src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_startup.S create mode 100644 src/vendorcode/amd/psp_verstage/picasso/include/bl_uapp/bl_errorcodes_public.h create mode 100644 src/vendorcode/amd/psp_verstage/picasso/include/bl_uapp/bl_syscall_public.h (limited to 'src/vendorcode/amd') diff --git a/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S deleted file mode 100644 index db6556cb0a..0000000000 --- a/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S +++ /dev/null @@ -1,44 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -.arm -.global LastBytes -.section PSP_FOOTER_DATA, "a", %note -.balign 64 - -// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte -// in size so that the binary size is multiple of 64 bytes. -// -LastBytes: - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - -.end diff --git a/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_header.inc b/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_header.inc deleted file mode 100644 index 35c906a445..0000000000 --- a/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_header.inc +++ /dev/null @@ -1,64 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -.global LastBytes - -#define BL_UAPP_START_ADDRESS 0x00036000 -#define SIZE_OF_THIS_HEADER 256 -#define SIZE_OF_PSP_END 64 -#define IMAGE_SIZE LastBytes + SIZE_OF_PSP_END - BL_UAPP_START_ADDRESS - SIZE_OF_THIS_HEADER - -#define IMAGE_VERSION 0x01,0x00,0x00,0x00 -#define FW_TYPE 0x52 - - - // 256 byte binary header - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 // nonce - .byte 0x00,0x00,0x00,0x00 // header version - .word IMAGE_SIZE - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte IMAGE_VERSION - .byte 0x00,0x00,0x00,0x00 // APU Family ID - .byte 0x00,0x01,0x00,0x00 // Load Address - .byte 0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte FW_TYPE - .byte 0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 diff --git a/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_startup.S b/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_startup.S deleted file mode 100644 index f5f1e18e6c..0000000000 --- a/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_startup.S +++ /dev/null @@ -1,71 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -#include -#include - - .global Main - .global _psp_vs_start - - .global PSP_VERSTAGE_STACK_END - -.arm -.text -.section "PSP_HEADER_DATA", "aw", %note - -//============================================================================== -// First 256 bytes of the binary image contain the header. -// Executable code starts from offset 0x100. -//============================================================================== -#include "bl_uapp_header.inc" - -//============================================================================== -// This is entry point to the binary which is called by main Boot Loader. -//============================================================================== - -ENTRY(_psp_vs_start) - - ldr sp, =PSP_VERSTAGE_STACK_END // stack pointer - - // Return value contains Virtual Address of mapped stack - // - ldr lr, =ShouldNotBeReached // return address - - ldr r2, =Main // pass control to verstage main function - blx r2 - -// This point should not be reached. The Main() function should return -// to main BL using Svc_Exit(). -// -ShouldNotBeReached: - mov r0, #BL_ERR_GENERIC // Returned from Main - svc #0x0 // SVC_EXIT - -ENDPROC(_psp_vs_start) -.end diff --git a/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_errorcodes_public.h b/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_errorcodes_public.h deleted file mode 100644 index 4fa9a3371f..0000000000 --- a/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_errorcodes_public.h +++ /dev/null @@ -1,37 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2020, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - *******************************************************************************/ - -#ifndef BL_ERRORCODES_PUBLIC_H -#define BL_ERRORCODES_PUBLIC_H - -/* Bootloader Return Codes, Error only (0x00 through 0x9F) */ -#define BL_OK 0x00 // General - Success -#define BL_ERR_GENERIC 0x01 // Generic Error Code - -#endif /* BL_ERRORCODES_PUBLIC_H */ diff --git a/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h deleted file mode 100644 index d88bfe1801..0000000000 --- a/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h +++ /dev/null @@ -1,349 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2020, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -#ifndef _BL_SYSCALL_PUBLIC_H_ -#define _BL_SYSCALL_PUBLIC_H_ - -#include - -#define SVC_EXIT 0x00 -#define SVC_ENTER 0x02 -#define SVC_DEBUG_PRINT 0x06 -#define SVC_MODEXP 0x0C -#define SVC_DEBUG_PRINT_EX 0x1A -#define SVC_GET_BOOT_MODE 0x1C -#define SVC_DELAY_IN_MICRO_SECONDS 0x2F -#define SVC_GET_SPI_INFO 0x60 -#define SVC_MAP_SPIROM_DEVICE 0x61 -#define SVC_UNMAP_SPIROM_DEVICE 0x62 -#define SVC_MAP_FCH_IO_DEVICE 0x63 -#define SVC_UNMAP_FCH_IO_DEVICE 0x64 -#define SVC_UPDATE_PSP_BIOS_DIR 0x65 -#define SVC_COPY_DATA_FROM_UAPP 0x66 -#define SVC_RESET_SYSTEM 0x67 -#define SVC_READ_TIMER_VAL 0x68 -#define SVC_SHA 0x69 -#define SVC_CCP_DMA 0x6A -#define SVC_SET_PLATFORM_BOOT_MODE 0x6C -#define SVC_WRITE_POSTCODE 0x6D - -struct mod_exp_params { - char *pExponent; // Exponent address - unsigned int ExpSize; // Exponent size in bytes - char *pModulus; // Modulus address - unsigned int ModulusSize; // Modulus size in bytes - char *pMessage; // Message address, same size as ModulusSize - char *pOutput; // Output address; Must be big enough to hold the - // data of ModulusSize -}; - -enum psp_boot_mode { - PSP_BOOT_MODE_S0 = 0x0, - PSP_BOOT_MODE_S0i3_RESUME = 0x1, - PSP_BOOT_MODE_S3_RESUME = 0x2, - PSP_BOOT_MODE_S4 = 0x3, - PSP_BOOT_MODE_S5_COLD = 0x4, - PSP_BOOT_MODE_S5_WARM = 0x5, -}; - -enum reset_type -{ - RESET_TYPE_COLD = 0, - RESET_TYPE_WARM = 1, - RESET_TYPE_MAX = 2, -}; - -enum fch_io_device { - FCH_IO_DEVICE_SPI, - FCH_IO_DEVICE_I2C, - FCH_IO_DEVICE_GPIO, - FCH_IO_DEVICE_ESPI, - FCH_IO_DEVICE_IOMUX, - FCH_IO_DEVICE_MISC, - FCH_IO_DEVICE_AOAC, - FCH_IO_DEVICE_IOPORT, - FCH_IO_DEVICE_UART, - - FCH_IO_DEVICE_END, -}; - -enum fch_uart_id { - FCH_UART_ID_0 = 0, - FCH_UART_ID_1 = 1, - FCH_UART_ID_MAX, -}; - -enum fch_i2c_controller_id { - FCH_I2C_CONTROLLER_ID_0 = 0, - FCH_I2C_CONTROLLER_ID_1 = 1, - FCH_I2C_CONTROLLER_ID_2 = 2, - FCH_I2C_CONTROLLER_ID_3 = 3, - FCH_I2C_CONTROLLER_ID_MAX, -}; - -struct spirom_info { - void *SpiBiosSysHubBase; - void *SpiBiosSmnBase; - uint32_t SpiBiosSize; -}; - -enum psp_timer_type { - PSP_TIMER_TYPE_CHRONO = 0, - PSP_TIMER_TYPE_SECURE_RTC = 1, - PSP_TIMER_TYPE_MAX = 2, -}; - -/* SHA types same as ccp SHA type in crypto.h */ -enum sha_type { - SHA_TYPE_256, - SHA_TYPE_384 -}; - -/* All SHA operation supported */ -enum sha_operation_mode { - SHA_GENERIC -}; - -/* SHA Supported Data Structures */ -struct sha_generic_data { - enum sha_type SHAType; - uint8_t *Data; - uint32_t DataLen; - uint32_t DataMemType; - uint8_t *Digest; - uint32_t DigestLen; - uint8_t *IntermediateDigest; - uint32_t IntermediateMsgLen; - uint32_t Init; - uint32_t Eom; -}; - -/* - * This is state that PSP manages internally. - * We only report BOOT_MODE_DEVELOPER or BOOT_MODE_PRODUCTION in verstage. - */ -enum chrome_platform_boot_mode -{ - NON_CHROME_BOOK_BOOT_MODE = 0x0, - CHROME_BOOK_BOOT_MODE_UNSIGNED_VERSTAGE = 0x1, - CHROME_BOOK_BOOT_MODE_PRODUCTION = 0x2, - CHROME_BOOK_BOOT_MODE_DEVELOPER = 0x3, - CHROME_BOOK_BOOT_MODE_TYPE_MAX_LIMIT = 0x4, // used for boundary check -}; - -/* - * Exit to the main Boot Loader. This does not return back to user application. - * - * Parameters: - * status - either Ok or error code defined by AGESA - */ -void svc_exit(uint32_t status); - -/* Print debug message into serial console. - * - * Parameters: - * string - null-terminated string - */ -void svc_debug_print(const char *string); - -/* Print 4 DWORD values in hex to serial console - * - * Parameters: - * dword0...dword3 - 32-bit DWORD to print - */ -void svc_debug_print_ex(uint32_t dword0, - uint32_t dword1, uint32_t dword2, uint32_t dword3); - -/* Description - Returns the current boot mode from the enum psp_boot_mode found in - * bl_public.h. - * - * Inputs - boot_mode - Output parameter passed in R0 - * - * Outputs - The boot mode in boot_mode. - * See Return Values. - * - * Return Values - BL_OK - * BL_ERR_NULL_PTR - * Other BL_ERRORs lofted up from called functions - */ -uint32_t svc_get_boot_mode(uint32_t *boot_mode); - -/* Add delay in micro seconds - * - * Parameters: - * delay - required delay value in microseconds - * - * Return value: NONE - */ -void svc_delay_in_usec(uint32_t delay); - -/* Get the SPI-ROM information - * - * Parameters: - * spi_rom_iInfo - SPI-ROM information - * - * Return value: BL_OK or error code - */ -uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info); - -/* Map the FCH IO device register space (SPI/I2C/GPIO/eSPI/etc...) - * - * Parameters: - * io_device - ID for respective FCH IO controller register space to be mapped - * arg1 - Based on IODevice ID, interpretation of this argument changes. - * arg2 - Based on IODevice ID, interpretation of this argument changes. - * io_device_axi_addr - AXI address for respective FCH IO device register space - * - * Return value: BL_OK or error code - */ -uint32_t svc_map_fch_dev(enum fch_io_device io_device, - uint32_t arg1, uint32_t arg2, void **io_device_axi_addr); - -/* Unmap the FCH IO device register space mapped earlier using Svc_MapFchIODevice() - * - * Parameters: - * io_device - ID for respective FCH IO controller register space to be unmapped - * io_device_addr - AXI address for respective FCH IO device register space - * - * Return value: BL_OK or error code - */ -uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, - void *io_device_axi_addr); - -/* Map the SPIROM FLASH device address space - * - * Parameters: - * SpiRomAddr - Address in SPIROM tobe mapped (SMN based) - * size - Size to be mapped - * pSpiRomAddrAxi - Mapped address in AXI space - * - * Return value: BL_OK or error code - */ -uint32_t svc_map_spi_rom(void *spi_rom_addr, - uint32_t size, void **spi_rom_axi_addr); - -/* Unmap the SPIROM FLASH device address space mapped earlier using Svc_MapSpiRomDevice() - * - * Parameters: - * pSpiRomAddrAxi - Address in AXI address space previously mapped - * - * Return value: BL_OK or error code - */ -uint32_t svc_unmap_spi_rom(void *spi_rom_addr); - -/* Updates the offset at which PSP or BIOS Directory can be found in the - * SPI flash - * - * Parameters: - * psp_dir_offset - [in/out] Offset at which PSP Directory can be - * found in the SPI Flash. Same pointer is used - * to return the offset in case of GET operation - * bios_dir_offset - [in/out] Offset at which BIOS Directory can be - * found in the SPI Flash. Same pointer is used - * to return the offset in case of GET operation - * - * Return value: BL_OK or error code - */ -uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, - uint32_t *bios_dir_offset); - -/* Copies the data that is shared by verstage to the PSP BL owned memory - * - * Parameters: - * address - Address in UAPP controlled/owned memory - * size - Total size of memory to copy (max 16Kbytes) - */ -uint32_t svc_save_uapp_data(void *address, uint32_t size); - -/* - * Read timer raw (currently CHRONO and RTC) value - * - * Parameters: - * type - [in] Type of timer UAPP would like to read from - * (currently CHRONO and RTC) - * counter_value - [out] return the raw counter value read from - * RTC or CHRONO_LO/HI counter register - -----------------------------------------------------------------------------*/ -uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value); - -/* - * Reset the system - * - * Parameters: - * reset_type - Cold or Warm reset - */ -uint32_t svc_reset_system(enum reset_type reset_type); - -/* - * Write postcode to Port-80 - * - * Parameters: - * postcode - Postcode value to be written on port-80h - */ -uint32_t svc_write_postcode(uint32_t postcode); - -/* - * Generic SHA call for SHA, SHA_OTP, SHA_HMAC - */ -uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode); - -/* - * Calculate ModEx - * - * Parameters: - * mod_exp_param - ModExp parameters - * - * Return value: BL_OK or error code - */ -uint32_t svc_modexp(struct mod_exp_params *mod_exp_param); - -/* - * Copies the data from source to destination using ccp - * - * Parameters: - * Source Address - SPI ROM offset - * Destination Address - Address in Verstage memory - * Size - Total size to copy - * - * Return value: BL_OK or error code - */ -uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size); - -/* - * Get the Platform boot mode from verstage. Production or developer - * - * Parameters: - * - boot mode - -----------------------------------------------------------------------------*/ -uint32_t svc_set_platform_boot_mode(enum chrome_platform_boot_mode boot_mode); - -/* C entry point for the Bootloader Userspace Application */ -void Main(void); - -#endif /* _BL_SYSCALL__PUBLIC_H_ */ diff --git a/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S deleted file mode 100644 index db6556cb0a..0000000000 --- a/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S +++ /dev/null @@ -1,44 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -.arm -.global LastBytes -.section PSP_FOOTER_DATA, "a", %note -.balign 64 - -// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte -// in size so that the binary size is multiple of 64 bytes. -// -LastBytes: - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - -.end diff --git a/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_header.inc b/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_header.inc deleted file mode 100644 index bb90f67817..0000000000 --- a/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_header.inc +++ /dev/null @@ -1,64 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -.global LastBytes - -#define BL_UAPP_START_ADDRESS 0x00036000 -#define SIZE_OF_THIS_HEADER 256 -#define SIZE_OF_PSP_END 64 -#define IMAGE_SIZE LastBytes + SIZE_OF_PSP_END - BL_UAPP_START_ADDRESS - SIZE_OF_THIS_HEADER - -#define IMAGE_VERSION 0x01,0x00,0x00,0x00 -#define FW_TYPE 0x52 - - - // 256 byte binary header - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 // nonce - .byte 0x00,0x00,0x00,0x00 // header version - .word IMAGE_SIZE - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x49,0x01,0x00,0x00,0x00,0x00,0x00,0x00 - .byte IMAGE_VERSION - .byte 0x00,0x00,0x00,0x00 // APU Family ID - .byte 0x00,0x01,0x00,0x00 // Load Address - .byte 0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte FW_TYPE - .byte 0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 diff --git a/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_startup.S b/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_startup.S deleted file mode 100644 index f5f1e18e6c..0000000000 --- a/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_startup.S +++ /dev/null @@ -1,71 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -#include -#include - - .global Main - .global _psp_vs_start - - .global PSP_VERSTAGE_STACK_END - -.arm -.text -.section "PSP_HEADER_DATA", "aw", %note - -//============================================================================== -// First 256 bytes of the binary image contain the header. -// Executable code starts from offset 0x100. -//============================================================================== -#include "bl_uapp_header.inc" - -//============================================================================== -// This is entry point to the binary which is called by main Boot Loader. -//============================================================================== - -ENTRY(_psp_vs_start) - - ldr sp, =PSP_VERSTAGE_STACK_END // stack pointer - - // Return value contains Virtual Address of mapped stack - // - ldr lr, =ShouldNotBeReached // return address - - ldr r2, =Main // pass control to verstage main function - blx r2 - -// This point should not be reached. The Main() function should return -// to main BL using Svc_Exit(). -// -ShouldNotBeReached: - mov r0, #BL_ERR_GENERIC // Returned from Main - svc #0x0 // SVC_EXIT - -ENDPROC(_psp_vs_start) -.end diff --git a/src/vendorcode/amd/fsp/common/include/bl_uapp/bl_errorcodes_public.h b/src/vendorcode/amd/fsp/common/include/bl_uapp/bl_errorcodes_public.h deleted file mode 100644 index 4fa9a3371f..0000000000 --- a/src/vendorcode/amd/fsp/common/include/bl_uapp/bl_errorcodes_public.h +++ /dev/null @@ -1,37 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2020, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - *******************************************************************************/ - -#ifndef BL_ERRORCODES_PUBLIC_H -#define BL_ERRORCODES_PUBLIC_H - -/* Bootloader Return Codes, Error only (0x00 through 0x9F) */ -#define BL_OK 0x00 // General - Success -#define BL_ERR_GENERIC 0x01 // Generic Error Code - -#endif /* BL_ERRORCODES_PUBLIC_H */ diff --git a/src/vendorcode/amd/fsp/glinda/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/fsp/glinda/include/bl_uapp/bl_syscall_public.h deleted file mode 100644 index 0516e6315d..0000000000 --- a/src/vendorcode/amd/fsp/glinda/include/bl_uapp/bl_syscall_public.h +++ /dev/null @@ -1,377 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2022, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -/* TODO: Update for Glinda */ - -#ifndef _BL_SYSCALL_PUBLIC_H_ -#define _BL_SYSCALL_PUBLIC_H_ - -#include - -#define SVC_EXIT 0x00 -#define SVC_ENTER 0x02 -#define SVC_VERSTAGE_CMD 0x3A - -enum verstage_cmd_id { - CMD_SHA = 1, - CMD_MODEXP, - CMD_DEBUG_PRINT, - CMD_DEBUG_PRINT_EX, - CMD_UPDATE_PSP_BIOS_DIR, - CMD_GET_SPI_INFO, - CMD_MAP_SPIROM_DEVICE, - CMD_UNMAP_SPIROM_DEVICE, - CMD_READ_TIMER_VAL, - CMD_DELAY_IN_MICRO_SECONDS, - CMD_RESET_SYSTEM, - CMD_GET_BOOT_MODE, - CMD_COPY_DATA_FROM_UAPP, - CMD_MAP_FCH_IO_DEVICE, - CMD_UNMAP_FCH_IO_DEVICE, - CMD_CCP_DMA, - CMD_SET_PLATFORM_BOOT_MODE, - CMD_SET_FW_HASH_TABLE, -}; - -struct mod_exp_params { - char *pExponent; // Exponent address - unsigned int ExpSize; // Exponent size in bytes - char *pModulus; // Modulus address - unsigned int ModulusSize; // Modulus size in bytes - char *pMessage; // Message address, same size as ModulusSize - char *pOutput; // Output address; Must be big enough to hold the - // data of ModulusSize -}; - -enum psp_boot_mode { - PSP_BOOT_MODE_S0 = 0x0, - PSP_BOOT_MODE_S0i3_RESUME = 0x1, - PSP_BOOT_MODE_S3_RESUME = 0x2, - PSP_BOOT_MODE_S4 = 0x3, - PSP_BOOT_MODE_S5_COLD = 0x4, - PSP_BOOT_MODE_S5_WARM = 0x5, -}; - -enum reset_type -{ - RESET_TYPE_COLD = 0, - RESET_TYPE_WARM = 1, - RESET_TYPE_MAX = 2, -}; - -enum fch_io_device { - FCH_IO_DEVICE_SPI, - FCH_IO_DEVICE_I2C, - FCH_IO_DEVICE_GPIO, - FCH_IO_DEVICE_ESPI, - FCH_IO_DEVICE_IOMUX, - FCH_IO_DEVICE_MISC, - FCH_IO_DEVICE_AOAC, - FCH_IO_DEVICE_IOPORT, - FCH_IO_DEVICE_END, -}; - -enum fch_i2c_controller_id { - FCH_I2C_CONTROLLER_ID_0 = 0, - FCH_I2C_CONTROLLER_ID_1 = 1, - FCH_I2C_CONTROLLER_ID_2 = 2, - FCH_I2C_CONTROLLER_ID_3 = 3, - FCH_I2C_CONTROLLER_ID_MAX, -}; - -struct spirom_info { - void *SpiBiosSysHubBase; - void *SpiBiosSmnBase; - uint32_t SpiBiosSize; -}; - -enum psp_timer_type { - PSP_TIMER_TYPE_CHRONO = 0, - PSP_TIMER_TYPE_SECURE_RTC = 1, - PSP_TIMER_TYPE_MAX = 2, -}; - -/* SHA types same as ccp SHA type in crypto.h */ -enum sha_type { - SHA_TYPE_256, - SHA_TYPE_384 -}; - -/* All SHA operation supported */ -enum sha_operation_mode { - SHA_GENERIC -}; - -/* SHA Supported Data Structures */ -struct sha_generic_data { - enum sha_type SHAType; - uint8_t *Data; - uint32_t DataLen; - uint32_t DataMemType; - uint8_t *Digest; - uint32_t DigestLen; - uint8_t *IntermediateDigest; - uint32_t IntermediateMsgLen; - uint32_t Init; - uint32_t Eom; -}; - -/* - * This is state that PSP manages internally. - * We only report BOOT_MODE_DEVELOPER or BOOT_MODE_NORMAL in verstage. - */ -enum chrome_platform_boot_mode -{ - NON_CHROME_BOOK_BOOT_MODE = 0x0, - CHROME_BOOK_BOOT_MODE_UNSIGNED_VERSTAGE = 0x1, - CHROME_BOOK_BOOT_MODE_NORMAL = 0x2, - CHROME_BOOK_BOOT_MODE_DEVELOPER = 0x3, - CHROME_BOOK_BOOT_MODE_TYPE_MAX_LIMIT = 0x4, // used for boundary check -}; - -struct psp_fw_entry_hash_256 { - uint16_t fw_type; - uint16_t sub_type; - uint8_t sha[32]; -} __packed; - -struct psp_fw_entry_hash_384 { - uint16_t fw_type; - uint16_t sub_type; - uint8_t sha[48]; -} __packed; - -struct psp_fw_hash_table { - uint16_t version; // Version of psp_fw_hash_table, Start with 0. - uint16_t no_of_entries_256; - uint16_t no_of_entries_384; - struct psp_fw_entry_hash_256 *fw_hash_256; - struct psp_fw_entry_hash_384 *fw_hash_384; -} __packed; - -/* - * Exit to the main Boot Loader. This does not return back to user application. - * - * Parameters: - * status - either Ok or error code defined by AGESA - */ -void svc_exit(uint32_t status); - -/* Print debug message into serial console. - * - * Parameters: - * string - null-terminated string - */ -void svc_debug_print(const char *string); - -/* Print 4 DWORD values in hex to serial console - * - * Parameters: - * dword0...dword3 - 32-bit DWORD to print - */ -void svc_debug_print_ex(uint32_t dword0, - uint32_t dword1, uint32_t dword2, uint32_t dword3); - -/* Description - Returns the current boot mode from the enum psp_boot_mode found in - * bl_public.h. - * - * Inputs - boot_mode - Output parameter passed in R0 - * - * Outputs - The boot mode in boot_mode. - * See Return Values. - * - * Return Values - BL_OK - * BL_ERR_NULL_PTR - * Other BL_ERRORs lofted up from called functions - */ -uint32_t svc_get_boot_mode(uint32_t *boot_mode); - -/* Add delay in micro seconds - * - * Parameters: - * delay - required delay value in microseconds - * - * Return value: NONE - */ -void svc_delay_in_usec(uint32_t delay); - -/* Get the SPI-ROM information - * - * Parameters: - * spi_rom_iInfo - SPI-ROM information - * - * Return value: BL_OK or error code - */ -uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info); - -/* Map the FCH IO device register space (SPI/I2C/GPIO/eSPI/etc...) - * - * Parameters: - * io_device - ID for respective FCH IO controller register space to be mapped - * arg1 - Based on IODevice ID, interpretation of this argument changes. - * arg2 - Based on IODevice ID, interpretation of this argument changes. - * io_device_axi_addr - AXI address for respective FCH IO device register space - * - * Return value: BL_OK or error code - */ -uint32_t svc_map_fch_dev(enum fch_io_device io_device, - uint32_t arg1, uint32_t arg2, void **io_device_axi_addr); - -/* Unmap the FCH IO device register space mapped earlier using Svc_MapFchIODevice() - * - * Parameters: - * io_device - ID for respective FCH IO controller register space to be unmapped - * io_device_addr - AXI address for respective FCH IO device register space - * - * Return value: BL_OK or error code - */ -uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, - void *io_device_axi_addr); - -/* Map the SPIROM FLASH device address space - * - * Parameters: - * SpiRomAddr - Address in SPIROM tobe mapped (SMN based) - * size - Size to be mapped - * pSpiRomAddrAxi - Mapped address in AXI space - * - * Return value: BL_OK or error code - */ -uint32_t svc_map_spi_rom(void *spi_rom_addr, - uint32_t size, void **spi_rom_axi_addr); - -/* Unmap the SPIROM FLASH device address space mapped earlier using Svc_MapSpiRomDevice() - * - * Parameters: - * pSpiRomAddrAxi - Address in AXI address space previously mapped - * - * Return value: BL_OK or error code - */ -uint32_t svc_unmap_spi_rom(void *spi_rom_addr); - -/* Updates the offset at which PSP or BIOS Directory can be found in the - * SPI flash - * - * Parameters: - * psp_dir_offset - [in/out] Offset at which PSP Directory can be - * found in the SPI Flash. Same pointer is used - * to return the offset in case of GET operation - * bios_dir_offset - [in/out] Offset at which BIOS Directory can be - * found in the SPI Flash. Same pointer is used - * to return the offset in case of GET operation - * - * Return value: BL_OK or error code - */ -uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, - uint32_t *bios_dir_offset); - -/* Copies the data that is shared by verstage to the PSP BL owned memory - * - * Parameters: - * address - Address in UAPP controlled/owned memory - * size - Total size of memory to copy (max 16Kbytes) - */ -uint32_t svc_save_uapp_data(void *address, uint32_t size); - -/* - * Read timer raw (currently CHRONO and RTC) value - * - * Parameters: - * type - [in] Type of timer UAPP would like to read from - * (currently CHRONO and RTC) - * counter_value - [out] return the raw counter value read from - * RTC or CHRONO_LO/HI counter register - -----------------------------------------------------------------------------*/ -uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value); - -/* - * Reset the system - * - * Parameters: - * reset_type - Cold or Warm reset - */ -uint32_t svc_reset_system(enum reset_type reset_type); - -/* - * Write postcode to Port-80 - * - * Parameters: - * postcode - Postcode value to be written on port-80h - */ -uint32_t svc_write_postcode(uint32_t postcode); - -/* - * Generic SHA call for SHA, SHA_OTP, SHA_HMAC - */ -uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode); - -/* - * Calculate ModEx - * - * Parameters: - * mod_exp_param - ModExp parameters - * - * Return value: BL_OK or error code - */ -uint32_t svc_modexp(struct mod_exp_params *mod_exp_param); - -/* - * Copies the data from source to destination using ccp - * - * Parameters: - * Source Address - SPI ROM offset - * Destination Address - Address in Verstage memory - * Size - Total size to copy - * - * Return value: BL_OK or error code - */ -uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size); - -/* - * Get the Platform boot mode from verstage. Normal or developer - * - * Parameters: - * - boot mode - -----------------------------------------------------------------------------*/ -uint32_t svc_set_platform_boot_mode(enum chrome_platform_boot_mode boot_mode); - -/* - * Set the PSP FW hash table. - * - * Parameters: - * - hash_table - Table of hash for each PSP binary signed against SoC chain of trust - * - * Return value: BL_OK or error code - */ -uint32_t svc_set_fw_hash_table(struct psp_fw_hash_table *hash_table); - -/* C entry point for the Bootloader Userspace Application */ -void Main(void); - -#endif /* _BL_SYSCALL__PUBLIC_H_ */ diff --git a/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S deleted file mode 100644 index db6556cb0a..0000000000 --- a/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S +++ /dev/null @@ -1,44 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -.arm -.global LastBytes -.section PSP_FOOTER_DATA, "a", %note -.balign 64 - -// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte -// in size so that the binary size is multiple of 64 bytes. -// -LastBytes: - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - -.end diff --git a/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_header.inc b/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_header.inc deleted file mode 100644 index bb90f67817..0000000000 --- a/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_header.inc +++ /dev/null @@ -1,64 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -.global LastBytes - -#define BL_UAPP_START_ADDRESS 0x00036000 -#define SIZE_OF_THIS_HEADER 256 -#define SIZE_OF_PSP_END 64 -#define IMAGE_SIZE LastBytes + SIZE_OF_PSP_END - BL_UAPP_START_ADDRESS - SIZE_OF_THIS_HEADER - -#define IMAGE_VERSION 0x01,0x00,0x00,0x00 -#define FW_TYPE 0x52 - - - // 256 byte binary header - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 // nonce - .byte 0x00,0x00,0x00,0x00 // header version - .word IMAGE_SIZE - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x49,0x01,0x00,0x00,0x00,0x00,0x00,0x00 - .byte IMAGE_VERSION - .byte 0x00,0x00,0x00,0x00 // APU Family ID - .byte 0x00,0x01,0x00,0x00 // Load Address - .byte 0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte FW_TYPE - .byte 0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 diff --git a/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_startup.S b/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_startup.S deleted file mode 100644 index f5f1e18e6c..0000000000 --- a/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_startup.S +++ /dev/null @@ -1,71 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -#include -#include - - .global Main - .global _psp_vs_start - - .global PSP_VERSTAGE_STACK_END - -.arm -.text -.section "PSP_HEADER_DATA", "aw", %note - -//============================================================================== -// First 256 bytes of the binary image contain the header. -// Executable code starts from offset 0x100. -//============================================================================== -#include "bl_uapp_header.inc" - -//============================================================================== -// This is entry point to the binary which is called by main Boot Loader. -//============================================================================== - -ENTRY(_psp_vs_start) - - ldr sp, =PSP_VERSTAGE_STACK_END // stack pointer - - // Return value contains Virtual Address of mapped stack - // - ldr lr, =ShouldNotBeReached // return address - - ldr r2, =Main // pass control to verstage main function - blx r2 - -// This point should not be reached. The Main() function should return -// to main BL using Svc_Exit(). -// -ShouldNotBeReached: - mov r0, #BL_ERR_GENERIC // Returned from Main - svc #0x0 // SVC_EXIT - -ENDPROC(_psp_vs_start) -.end diff --git a/src/vendorcode/amd/fsp/mendocino/include/bl_uapp/bl_errorcodes_public.h b/src/vendorcode/amd/fsp/mendocino/include/bl_uapp/bl_errorcodes_public.h deleted file mode 100644 index 4fa9a3371f..0000000000 --- a/src/vendorcode/amd/fsp/mendocino/include/bl_uapp/bl_errorcodes_public.h +++ /dev/null @@ -1,37 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2020, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - *******************************************************************************/ - -#ifndef BL_ERRORCODES_PUBLIC_H -#define BL_ERRORCODES_PUBLIC_H - -/* Bootloader Return Codes, Error only (0x00 through 0x9F) */ -#define BL_OK 0x00 // General - Success -#define BL_ERR_GENERIC 0x01 // Generic Error Code - -#endif /* BL_ERRORCODES_PUBLIC_H */ diff --git a/src/vendorcode/amd/fsp/mendocino/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/fsp/mendocino/include/bl_uapp/bl_syscall_public.h deleted file mode 100644 index d09f39cec1..0000000000 --- a/src/vendorcode/amd/fsp/mendocino/include/bl_uapp/bl_syscall_public.h +++ /dev/null @@ -1,396 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2020, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -#ifndef _BL_SYSCALL_PUBLIC_H_ -#define _BL_SYSCALL_PUBLIC_H_ - -#include - -#define SVC_EXIT 0x00 -#define SVC_ENTER 0x02 -#define SVC_VERSTAGE_CMD 0x3A - -enum verstage_cmd_id { - CMD_SHA = 1, - CMD_MODEXP, - CMD_DEBUG_PRINT, - CMD_DEBUG_PRINT_EX, - CMD_UPDATE_PSP_BIOS_DIR, - CMD_GET_SPI_INFO, - CMD_MAP_SPIROM_DEVICE, - CMD_UNMAP_SPIROM_DEVICE, - CMD_READ_TIMER_VAL, - CMD_DELAY_IN_MICRO_SECONDS, - CMD_RESET_SYSTEM, - CMD_GET_BOOT_MODE, - CMD_COPY_DATA_FROM_UAPP, - CMD_MAP_FCH_IO_DEVICE, - CMD_UNMAP_FCH_IO_DEVICE, - CMD_CCP_DMA, - CMD_SET_PLATFORM_BOOT_MODE, - CMD_SET_FW_HASH_TABLE, - CMD_GET_PREV_BOOT_STATUS, - CMD_GET_HSP_SECURE_STATE, - CMD_WRITE_POSTCODE, -}; - -struct mod_exp_params { - char *pExponent; // Exponent address - unsigned int ExpSize; // Exponent size in bytes - char *pModulus; // Modulus address - unsigned int ModulusSize; // Modulus size in bytes - char *pMessage; // Message address, same size as ModulusSize - char *pOutput; // Output address; Must be big enough to hold the - // data of ModulusSize -}; - -enum psp_boot_mode { - PSP_BOOT_MODE_S0 = 0x0, - PSP_BOOT_MODE_S0i3_RESUME = 0x1, - PSP_BOOT_MODE_S3_RESUME = 0x2, - PSP_BOOT_MODE_S4 = 0x3, - PSP_BOOT_MODE_S5_COLD = 0x4, - PSP_BOOT_MODE_S5_WARM = 0x5, -}; - -enum reset_type -{ - RESET_TYPE_COLD = 0, - RESET_TYPE_WARM = 1, - RESET_TYPE_MAX = 2, -}; - -enum fch_io_device { - FCH_IO_DEVICE_SPI, - FCH_IO_DEVICE_I2C, - FCH_IO_DEVICE_GPIO, - FCH_IO_DEVICE_ESPI, - FCH_IO_DEVICE_IOMUX, - FCH_IO_DEVICE_MISC, - FCH_IO_DEVICE_AOAC, - FCH_IO_DEVICE_IOPORT, - FCH_IO_DEVICE_END, -}; - -enum fch_i2c_controller_id { - FCH_I2C_CONTROLLER_ID_0 = 0, - FCH_I2C_CONTROLLER_ID_1 = 1, - FCH_I2C_CONTROLLER_ID_2 = 2, - FCH_I2C_CONTROLLER_ID_3 = 3, - FCH_I2C_CONTROLLER_ID_MAX, -}; - -struct spirom_info { - void *SpiBiosSysHubBase; - void *SpiBiosSmnBase; - uint32_t SpiBiosSize; -}; - -enum psp_timer_type { - PSP_TIMER_TYPE_CHRONO = 0, - PSP_TIMER_TYPE_SECURE_RTC = 1, - PSP_TIMER_TYPE_MAX = 2, -}; - -/* SHA types same as ccp SHA type in crypto.h */ -enum sha_type { - SHA_TYPE_256, - SHA_TYPE_384 -}; - -/* All SHA operation supported */ -enum sha_operation_mode { - SHA_GENERIC -}; - -/* SHA Supported Data Structures */ -struct sha_generic_data { - enum sha_type SHAType; - uint8_t *Data; - uint32_t DataLen; - uint32_t DataMemType; - uint8_t *Digest; - uint32_t DigestLen; - uint8_t *IntermediateDigest; - uint32_t IntermediateMsgLen; - uint32_t Init; - uint32_t Eom; -}; - -/* - * This is state that PSP manages internally. - * We only report BOOT_MODE_DEVELOPER or BOOT_MODE_NORMAL in verstage. - */ -enum chrome_platform_boot_mode -{ - NON_CHROME_BOOK_BOOT_MODE = 0x0, - CHROME_BOOK_BOOT_MODE_UNSIGNED_VERSTAGE = 0x1, - CHROME_BOOK_BOOT_MODE_NORMAL = 0x2, - CHROME_BOOK_BOOT_MODE_DEVELOPER = 0x3, - CHROME_BOOK_BOOT_MODE_TYPE_MAX_LIMIT = 0x4, // used for boundary check -}; - -struct psp_fw_entry_hash_256 { - uint16_t fw_type; - uint16_t sub_type; - uint8_t sha[32]; -} __packed; - -struct psp_fw_entry_hash_384 { - uint16_t fw_type; - uint16_t sub_type; - uint8_t sha[48]; -} __packed; - -struct psp_fw_hash_table { - uint16_t version; // Version of psp_fw_hash_table, Start with 0. - uint16_t no_of_entries_256; - uint16_t no_of_entries_384; - struct psp_fw_entry_hash_256 *fw_hash_256; - struct psp_fw_entry_hash_384 *fw_hash_384; -} __packed; - -/* - * Exit to the main Boot Loader. This does not return back to user application. - * - * Parameters: - * status - either Ok or error code defined by AGESA - */ -void svc_exit(uint32_t status); - -/* Print debug message into serial console. - * - * Parameters: - * string - null-terminated string - */ -void svc_debug_print(const char *string); - -/* Print 4 DWORD values in hex to serial console - * - * Parameters: - * dword0...dword3 - 32-bit DWORD to print - */ -void svc_debug_print_ex(uint32_t dword0, - uint32_t dword1, uint32_t dword2, uint32_t dword3); - -/* Description - Returns the current boot mode from the enum psp_boot_mode found in - * bl_public.h. - * - * Inputs - boot_mode - Output parameter passed in R0 - * - * Outputs - The boot mode in boot_mode. - * See Return Values. - * - * Return Values - BL_OK - * BL_ERR_NULL_PTR - * Other BL_ERRORs lofted up from called functions - */ -uint32_t svc_get_boot_mode(uint32_t *boot_mode); - -/* Add delay in micro seconds - * - * Parameters: - * delay - required delay value in microseconds - * - * Return value: NONE - */ -void svc_delay_in_usec(uint32_t delay); - -/* Get the SPI-ROM information - * - * Parameters: - * spi_rom_iInfo - SPI-ROM information - * - * Return value: BL_OK or error code - */ -uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info); - -/* Map the FCH IO device register space (SPI/I2C/GPIO/eSPI/etc...) - * - * Parameters: - * io_device - ID for respective FCH IO controller register space to be mapped - * arg1 - Based on IODevice ID, interpretation of this argument changes. - * arg2 - Based on IODevice ID, interpretation of this argument changes. - * io_device_axi_addr - AXI address for respective FCH IO device register space - * - * Return value: BL_OK or error code - */ -uint32_t svc_map_fch_dev(enum fch_io_device io_device, - uint32_t arg1, uint32_t arg2, void **io_device_axi_addr); - -/* Unmap the FCH IO device register space mapped earlier using Svc_MapFchIODevice() - * - * Parameters: - * io_device - ID for respective FCH IO controller register space to be unmapped - * io_device_addr - AXI address for respective FCH IO device register space - * - * Return value: BL_OK or error code - */ -uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, - void *io_device_axi_addr); - -/* Map the SPIROM FLASH device address space - * - * Parameters: - * SpiRomAddr - Address in SPIROM tobe mapped (SMN based) - * size - Size to be mapped - * pSpiRomAddrAxi - Mapped address in AXI space - * - * Return value: BL_OK or error code - */ -uint32_t svc_map_spi_rom(void *spi_rom_addr, - uint32_t size, void **spi_rom_axi_addr); - -/* Unmap the SPIROM FLASH device address space mapped earlier using Svc_MapSpiRomDevice() - * - * Parameters: - * pSpiRomAddrAxi - Address in AXI address space previously mapped - * - * Return value: BL_OK or error code - */ -uint32_t svc_unmap_spi_rom(void *spi_rom_addr); - -/* Updates the offset at which PSP or BIOS Directory can be found in the - * SPI flash - * - * Parameters: - * psp_dir_offset - [in/out] Offset at which PSP Directory can be - * found in the SPI Flash. Same pointer is used - * to return the offset in case of GET operation - * bios_dir_offset - [in/out] Offset at which BIOS Directory can be - * found in the SPI Flash. Same pointer is used - * to return the offset in case of GET operation - * - * Return value: BL_OK or error code - */ -uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, - uint32_t *bios_dir_offset); - -/* Copies the data that is shared by verstage to the PSP BL owned memory - * - * Parameters: - * address - Address in UAPP controlled/owned memory - * size - Total size of memory to copy (max 16Kbytes) - */ -uint32_t svc_save_uapp_data(void *address, uint32_t size); - -/* - * Read timer raw (currently CHRONO and RTC) value - * - * Parameters: - * type - [in] Type of timer UAPP would like to read from - * (currently CHRONO and RTC) - * counter_value - [out] return the raw counter value read from - * RTC or CHRONO_LO/HI counter register - -----------------------------------------------------------------------------*/ -uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value); - -/* - * Reset the system - * - * Parameters: - * reset_type - Cold or Warm reset - */ -uint32_t svc_reset_system(enum reset_type reset_type); - -/* - * Write postcode to Port-80 - * - * Parameters: - * postcode - Postcode value to be written on port-80h - */ -uint32_t svc_write_postcode(uint32_t postcode); - -/* - * Generic SHA call for SHA, SHA_OTP, SHA_HMAC - */ -uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode); - -/* - * Calculate ModEx - * - * Parameters: - * mod_exp_param - ModExp parameters - * - * Return value: BL_OK or error code - */ -uint32_t svc_modexp(struct mod_exp_params *mod_exp_param); - -/* - * Copies the data from source to destination using ccp - * - * Parameters: - * Source Address - SPI ROM offset - * Destination Address - Address in Verstage memory - * Size - Total size to copy - * - * Return value: BL_OK or error code - */ -uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size); - -/* - * Get the Platform boot mode from verstage. Normal or developer - * - * Parameters: - * - boot mode - -----------------------------------------------------------------------------*/ -uint32_t svc_set_platform_boot_mode(enum chrome_platform_boot_mode boot_mode); - -/* - * Set the PSP FW hash table. - * - * Parameters: - * - hash_table - Table of hash for each PSP binary signed against SoC chain of trust - * - * Return value: BL_OK or error code - */ -uint32_t svc_set_fw_hash_table(struct psp_fw_hash_table *hash_table); - -/* Get the previous boot status. - * - * Parameters: - * - boot_status - Address where the boot status is read into - * - * Return value: BL_OK or error code - */ -uint32_t svc_get_prev_boot_status(uint32_t *boot_status); - -/* Get HSP Secure state - * - * Parameters: - * - hsp_secure_state - Address where the state info is read into - * - * Return value: BL_OK or error code - */ -uint32_t svc_get_hsp_secure_state(uint32_t *hsp_secure_state); - -/* C entry point for the Bootloader Userspace Application */ -void Main(void); - -#endif /* _BL_SYSCALL__PUBLIC_H_ */ diff --git a/src/vendorcode/amd/fsp/phoenix/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/fsp/phoenix/include/bl_uapp/bl_syscall_public.h deleted file mode 100644 index b3e41404e8..0000000000 --- a/src/vendorcode/amd/fsp/phoenix/include/bl_uapp/bl_syscall_public.h +++ /dev/null @@ -1,428 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2022, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -/* TODO: Update for Phoenix */ - -#ifndef _BL_SYSCALL_PUBLIC_H_ -#define _BL_SYSCALL_PUBLIC_H_ - -#include - -#define SVC_EXIT 0x00 -#define SVC_ENTER 0x02 -#define SVC_VERSTAGE_CMD 0x3A - -enum verstage_cmd_id { - CMD_SHA = 1, - CMD_MODEXP, - CMD_DEBUG_PRINT, - CMD_DEBUG_PRINT_EX, - CMD_UPDATE_PSP_BIOS_DIR, - CMD_GET_SPI_INFO, - CMD_MAP_SPIROM_DEVICE, - CMD_UNMAP_SPIROM_DEVICE, - CMD_READ_TIMER_VAL, - CMD_DELAY_IN_MICRO_SECONDS, - CMD_RESET_SYSTEM, - CMD_GET_BOOT_MODE, - CMD_COPY_DATA_FROM_UAPP, - CMD_MAP_FCH_IO_DEVICE, - CMD_UNMAP_FCH_IO_DEVICE, - CMD_CCP_DMA, - CMD_SET_PLATFORM_BOOT_MODE, - CMD_SET_FW_HASH_TABLE, - CMD_GET_PREV_BOOT_STATUS, - CMD_GET_HSP_SECURE_STATE, - CMD_WRITE_POSTCODE, - CMD_SET_FW_HASH_TABLE_STAGE1, - CMD_SET_FW_HASH_TABLE_STAGE2, - CMD_SET_FW_HASH_TABLE_TOS, -}; - -struct mod_exp_params { - char *pExponent; // Exponent address - unsigned int ExpSize; // Exponent size in bytes - char *pModulus; // Modulus address - unsigned int ModulusSize; // Modulus size in bytes - char *pMessage; // Message address, same size as ModulusSize - char *pOutput; // Output address; Must be big enough to hold the - // data of ModulusSize -}; - -enum psp_boot_mode { - PSP_BOOT_MODE_S0 = 0x0, - PSP_BOOT_MODE_S0i3_RESUME = 0x1, - PSP_BOOT_MODE_S3_RESUME = 0x2, - PSP_BOOT_MODE_S4 = 0x3, - PSP_BOOT_MODE_S5_COLD = 0x4, - PSP_BOOT_MODE_S5_WARM = 0x5, -}; - -enum reset_type -{ - RESET_TYPE_COLD = 0, - RESET_TYPE_WARM = 1, - RESET_TYPE_MAX = 2, -}; - -enum fch_io_device { - FCH_IO_DEVICE_SPI, - FCH_IO_DEVICE_I2C, - FCH_IO_DEVICE_GPIO, - FCH_IO_DEVICE_ESPI, - FCH_IO_DEVICE_IOMUX, - FCH_IO_DEVICE_MISC, - FCH_IO_DEVICE_AOAC, - FCH_IO_DEVICE_IOPORT, - FCH_IO_DEVICE_UART, - FCH_IO_DEVICE_END, -}; - -enum fch_i2c_controller_id { - FCH_I2C_CONTROLLER_ID_0 = 0, - FCH_I2C_CONTROLLER_ID_1 = 1, - FCH_I2C_CONTROLLER_ID_2 = 2, - FCH_I2C_CONTROLLER_ID_3 = 3, - FCH_I2C_CONTROLLER_ID_MAX, -}; - -enum fch_uart_id { - FCH_UART_ID_0 = 0, - FCH_UART_ID_1 = 1, - FCH_UART_ID_MAX, -}; - -struct spirom_info { - void *SpiBiosSysHubBase; - void *SpiBiosSmnBase; - uint32_t SpiBiosSize; -}; - -enum psp_timer_type { - PSP_TIMER_TYPE_CHRONO = 0, - PSP_TIMER_TYPE_SECURE_RTC = 1, - PSP_TIMER_TYPE_MAX = 2, -}; - -/* SHA types same as ccp SHA type in crypto.h */ -enum sha_type { - SHA_TYPE_256, - SHA_TYPE_384 -}; - -/* All SHA operation supported */ -enum sha_operation_mode { - SHA_GENERIC -}; - -/* SHA Supported Data Structures */ -struct sha_generic_data { - enum sha_type SHAType; - uint8_t *Data; - uint32_t DataLen; - uint32_t DataMemType; - uint8_t *Digest; - uint32_t DigestLen; - uint8_t *IntermediateDigest; - uint32_t IntermediateMsgLen; - uint32_t Init; - uint32_t Eom; -}; - -/* - * This is state that PSP manages internally. - * We only report BOOT_MODE_DEVELOPER or BOOT_MODE_NORMAL in verstage. - */ -enum chrome_platform_boot_mode -{ - NON_CHROME_BOOK_BOOT_MODE = 0x0, - CHROME_BOOK_BOOT_MODE_UNSIGNED_VERSTAGE = 0x1, - CHROME_BOOK_BOOT_MODE_NORMAL = 0x2, - CHROME_BOOK_BOOT_MODE_DEVELOPER = 0x3, - CHROME_BOOK_BOOT_MODE_TYPE_MAX_LIMIT = 0x4, // used for boundary check -}; - -struct psp_fw_entry_hash_256 { - uint16_t fw_type; - uint16_t sub_type; - uint8_t sha[32]; -} __packed; - -struct psp_fw_entry_hash_384 { - uint16_t fw_type; - uint16_t sub_type; - uint8_t sha[48]; -} __packed; - -struct psp_fw_hash_table { - uint16_t version; // Version 1 of psp_fw_hash_table. - uint16_t no_of_entries_256; - uint16_t no_of_entries_384; - struct psp_fw_entry_hash_256 *fw_hash_256; - struct psp_fw_entry_hash_384 *fw_hash_384; -} __packed; - -struct psp_fw_entry_hash_256_v2 { - uint8_t uuid[16]; - uint8_t sha[32]; -} __packed; - -struct psp_fw_entry_hash_384_v2 { - uint8_t uuid[16]; - uint8_t sha[48]; -} __packed; - -struct psp_fw_hash_table_v2 { - uint16_t version; // Version 2 of psp_fw_hash_table. - uint16_t no_of_entries_256; - uint16_t no_of_entries_384; - uint16_t reserved; // For alignment purposes. - struct psp_fw_entry_hash_256_v2 *fw_hash_256; - struct psp_fw_entry_hash_384_v2 *fw_hash_384; -} __packed; - -/* - * Exit to the main Boot Loader. This does not return back to user application. - * - * Parameters: - * status - either Ok or error code defined by AGESA - */ -void svc_exit(uint32_t status); - -/* Print debug message into serial console. - * - * Parameters: - * string - null-terminated string - */ -void svc_debug_print(const char *string); - -/* Print 4 DWORD values in hex to serial console - * - * Parameters: - * dword0...dword3 - 32-bit DWORD to print - */ -void svc_debug_print_ex(uint32_t dword0, - uint32_t dword1, uint32_t dword2, uint32_t dword3); - -/* Description - Returns the current boot mode from the enum psp_boot_mode found in - * bl_public.h. - * - * Inputs - boot_mode - Output parameter passed in R0 - * - * Outputs - The boot mode in boot_mode. - * See Return Values. - * - * Return Values - BL_OK - * BL_ERR_NULL_PTR - * Other BL_ERRORs lofted up from called functions - */ -uint32_t svc_get_boot_mode(uint32_t *boot_mode); - -/* Add delay in micro seconds - * - * Parameters: - * delay - required delay value in microseconds - * - * Return value: NONE - */ -void svc_delay_in_usec(uint32_t delay); - -/* Get the SPI-ROM information - * - * Parameters: - * spi_rom_iInfo - SPI-ROM information - * - * Return value: BL_OK or error code - */ -uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info); - -/* Map the FCH IO device register space (SPI/I2C/GPIO/eSPI/etc...) - * - * Parameters: - * io_device - ID for respective FCH IO controller register space to be mapped - * arg1 - Based on IODevice ID, interpretation of this argument changes. - * arg2 - Based on IODevice ID, interpretation of this argument changes. - * io_device_axi_addr - AXI address for respective FCH IO device register space - * - * Return value: BL_OK or error code - */ -uint32_t svc_map_fch_dev(enum fch_io_device io_device, - uint32_t arg1, uint32_t arg2, void **io_device_axi_addr); - -/* Unmap the FCH IO device register space mapped earlier using Svc_MapFchIODevice() - * - * Parameters: - * io_device - ID for respective FCH IO controller register space to be unmapped - * io_device_addr - AXI address for respective FCH IO device register space - * - * Return value: BL_OK or error code - */ -uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, - void *io_device_axi_addr); - -/* Map the SPIROM FLASH device address space - * - * Parameters: - * SpiRomAddr - Address in SPIROM tobe mapped (SMN based) - * size - Size to be mapped - * pSpiRomAddrAxi - Mapped address in AXI space - * - * Return value: BL_OK or error code - */ -uint32_t svc_map_spi_rom(void *spi_rom_addr, - uint32_t size, void **spi_rom_axi_addr); - -/* Unmap the SPIROM FLASH device address space mapped earlier using Svc_MapSpiRomDevice() - * - * Parameters: - * pSpiRomAddrAxi - Address in AXI address space previously mapped - * - * Return value: BL_OK or error code - */ -uint32_t svc_unmap_spi_rom(void *spi_rom_addr); - -/* Updates the offset at which PSP or BIOS Directory can be found in the - * SPI flash - * - * Parameters: - * psp_dir_offset - [in/out] Offset at which PSP Directory can be - * found in the SPI Flash. Same pointer is used - * to return the offset in case of GET operation - * bios_dir_offset - [in/out] Offset at which BIOS Directory can be - * found in the SPI Flash. Same pointer is used - * to return the offset in case of GET operation - * - * Return value: BL_OK or error code - */ -uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, - uint32_t *bios_dir_offset); - -/* Copies the data that is shared by verstage to the PSP BL owned memory - * - * Parameters: - * address - Address in UAPP controlled/owned memory - * size - Total size of memory to copy (max 16Kbytes) - */ -uint32_t svc_save_uapp_data(void *address, uint32_t size); - -/* - * Read timer raw (currently CHRONO and RTC) value - * - * Parameters: - * type - [in] Type of timer UAPP would like to read from - * (currently CHRONO and RTC) - * counter_value - [out] return the raw counter value read from - * RTC or CHRONO_LO/HI counter register - -----------------------------------------------------------------------------*/ -uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value); - -/* - * Reset the system - * - * Parameters: - * reset_type - Cold or Warm reset - */ -uint32_t svc_reset_system(enum reset_type reset_type); - -/* - * Write postcode to Port-80 - * - * Parameters: - * postcode - Postcode value to be written on port-80h - */ -uint32_t svc_write_postcode(uint32_t postcode); - -/* - * Generic SHA call for SHA, SHA_OTP, SHA_HMAC - */ -uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode); - -/* - * Calculate ModEx - * - * Parameters: - * mod_exp_param - ModExp parameters - * - * Return value: BL_OK or error code - */ -uint32_t svc_modexp(struct mod_exp_params *mod_exp_param); - -/* - * Copies the data from source to destination using ccp - * - * Parameters: - * Source Address - SPI ROM offset - * Destination Address - Address in Verstage memory - * Size - Total size to copy - * - * Return value: BL_OK or error code - */ -uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size); - -/* - * Get the Platform boot mode from verstage. Normal or developer - * - * Parameters: - * - boot mode - -----------------------------------------------------------------------------*/ -uint32_t svc_set_platform_boot_mode(enum chrome_platform_boot_mode boot_mode); - -/* - * Set PSP FW hash table. - * - * Parameters: - * - hash_table - Table of hash for each PSP binary signed against SoC chain of trust - * - cmd - Cmd to indicate the PSP stage using the hash table - * - * Return value: BL_OK or error code - */ -uint32_t svc_set_fw_hash_table(enum verstage_cmd_id cmd, void *hash_table); - -/* Get the previous boot status. - * - * Parameters: - * - boot_status - Address where the boot status is read into - * - * Return value: BL_OK or error code - */ -uint32_t svc_get_prev_boot_status(uint32_t *boot_status); - -/* Get HSP Secure state - * - * Parameters: - * - hsp_secure_state - Address where the state info is read into - * - * Return value: BL_OK or error code - */ -uint32_t svc_get_hsp_secure_state(uint32_t *hsp_secure_state); - -/* C entry point for the Bootloader Userspace Application */ -void Main(void); - -#endif /* _BL_SYSCALL__PUBLIC_H_ */ diff --git a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S deleted file mode 100644 index db6556cb0a..0000000000 --- a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S +++ /dev/null @@ -1,44 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -.arm -.global LastBytes -.section PSP_FOOTER_DATA, "a", %note -.balign 64 - -// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte -// in size so that the binary size is multiple of 64 bytes. -// -LastBytes: - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 - -.end diff --git a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_header.inc b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_header.inc deleted file mode 100644 index e2a16667a4..0000000000 --- a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_header.inc +++ /dev/null @@ -1,64 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -.global LastBytes - -#define BL_UAPP_START_ADDRESS 0x00015000 -#define SIZE_OF_THIS_HEADER 256 -#define SIZE_OF_PSP_END 64 -#define IMAGE_SIZE LastBytes + SIZE_OF_PSP_END - BL_UAPP_START_ADDRESS - SIZE_OF_THIS_HEADER - -#define IMAGE_VERSION 0x01,0x00,0x00,0x00 -#define FW_TYPE 0x52 - - - // 256 byte binary header - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 // nonce - .byte 0x00,0x00,0x00,0x00 // header version - .word IMAGE_SIZE - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte IMAGE_VERSION - .byte 0x00,0x00,0x00,0x00 // APU Family ID - .byte 0x00,0x01,0x00,0x00 // Load Address - .byte 0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte FW_TYPE - .byte 0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 diff --git a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S deleted file mode 100644 index 15340d58ae..0000000000 --- a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S +++ /dev/null @@ -1,105 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -#include -#include - - .global Main - .global _psp_vs_start - - .global PSP_VERSTAGE_STACK_BASE - .global PSP_VERSTAGE_STACK_END - .global PSP_VERSTAGE_TEMP_STACK_END - -.arm -.text -.section "PSP_HEADER_DATA", "aw", %note - -//============================================================================== -// First 256 bytes of the binary image contain the header. -// Executable code starts from offset 0x100. -//============================================================================== -#include "bl_uapp_header.inc" - -//============================================================================== -// This is entry point to the binary which is called by main Boot Loader. -//============================================================================== - -ENTRY(_psp_vs_start) - // Map Debug Unlock stack to separate Virtual Address so that stack - // overflow cause exception instead of data corruption. - // - - ldr sp, =PSP_VERSTAGE_TEMP_STACK_END // temporary stack pointer - ldr r2, =AllocateStack - blx r2 - - // Return value contains Virtual Address of mapped stack - // - mov sp, r0 // set OEM PSP BL user app stack pointer - ldr lr, =ShouldNotBeReached // return address - - ldr r2, =Main // pass control to verstage main function - blx r2 - -// This point should not be reached. The Main() function should return -// to main BL using Svc_Exit(). -// -ShouldNotBeReached: - mov r0, #BL_ERR_GENERIC // Returned from Main - svc #0x0 // SVC_EXIT - -ENDPROC(_psp_vs_start) - -//============================================================================== -// Code to allocate an address space for stack -//============================================================================== -.global AllocateStack - -ENTRY(AllocateStack) - push {r3,lr} - ldr r0, =PSP_VERSTAGE_STACK_BASE - mov r2, sp - ldr r1, =PSP_VERSTAGE_STACK_END - svc #0x1 // 0x1 is the SvcID for SVC_MAP_USER_STACK - cmp r0, #0 - bne svcExit - ldr r0,[sp,#0] - cmp r0, #0 // r0 contains the virtual stack address - bne ret - -svcExit: - mov r0, #BL_ERR_GENERIC - svc #0x0 // SVC_EXIT - -ret: - pop {r3,pc} - -ENDPROC(AllocateStack) -.end diff --git a/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h b/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h deleted file mode 100644 index 1d5e86ffb1..0000000000 --- a/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h +++ /dev/null @@ -1,80 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2020, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - *******************************************************************************/ - -#ifndef BL_ERRORCODES_PUBLIC_H -#define BL_ERRORCODES_PUBLIC_H - -/* Bootloader Return Codes, Error only (0x00 through 0x9F) */ -#define BL_OK 0x00 // General - Success -#define BL_ERR_GENERIC 0x01 // Generic Error Code -#define BL_ERR_MEMORY 0x02 // Generic Memory Error -#define BL_ERR_BUFFER_OVERFLOW 0x03 // Buffer Overflow -#define BL_ERR_INVALID_PARAMETER 0x04 // Invalid Parameter(s) -#define BL_ERR_DATA_ALIGNMENT 0x06 // Data Alignment Error -#define BL_ERR_NULL_PTR 0x07 // Null Pointer Error -#define BL_ERR_INVALID_ADDRESS 0x0A // Invalid Address -#define BL_ERR_OUT_OF_RESOURCES 0x0B // Out of Resource Error -#define BL_ERR_DATA_ABORT 0x0D // Data Abort exception -#define BL_ERR_PREFETCH_ABORT 0x0E // Prefetch Abort exception -#define BL_ERR_GET_FW_HEADER 0x13 // Failure in retrieving firmware - // header -#define BL_ERR_KEY_SIZE 0x14 // Key size not supported -#define BL_ERR_ENTRY_NOT_FOUND 0x15 // Entry not found at requested - // location -#define BL_ERR_UNSUPPORTED_PLATFORM 0x16 // Error when feature is not enabled - // on a given platform. -#define BL_ERR_FWVALIDATION 0x18 // Generic FW Validation error -#define BL_ERR_CCP_RSA 0x19 // RSA operation fail - bootloader -#define BL_ERR_CCP_PASSTHR 0x1A // CCP Passthrough operation failed -#define BL_ERR_CCP_AES 0x1B // AES operation failed -#define BL_ERR_SHA 0x1E // SHA256/SHA384 operation failed -#define BL_ERR_ZLIB 0x1F // ZLib Decompression operation fail -#define BL_ERR_DIR_ENTRY_NOT_FOUND 0x22 // PSP directory entry not found -#define BL_ERR_SYSHUBMAP_FAILED 0x3A // Unable to map a SYSHUB address to - // AXI space -#define BL_ERR_UAPP_PSP_HEADER_NOT_MATCH 0x7A // PSP level directory from OEM user- - // app does not match expected value. -#define BL_ERR_UAPP_BIOS_HEADER_NOT_MATCH 0x7B // BIOS level directory from OEM - // user-app not match expected value. -#define BL_ERR_UAPP_PSP_DIR_OFFSET_NOT_SET 0x7C // PSP Directory offset is not set - // by OEM user-app. -#define BL_ERR_UAPP_BIOS_DIR_OFFSET_NOT_SET 0x7D // BIOS Directory offset is not set - // by OEM user-app. -#define BL_ERR_POSTCODE_MAX_VALUE 0x9F // The maximum allowable error post - -/* Bootloader Return Codes, Success only (0xA0 through 0xFF) */ -#define BL_SUCCESS_USERMODE_OEM_APP 0xF7 // Updated only PSPFW Status when OEM - // PSP BL user app returns success. -#define BL_SUCCESS_PSP_BIOS_DIRECTORY_UPDATE 0xF8 // PSP and BIOS directories are loaded - // into SRAM from the offset provided - // by OEM user app. - -#define BL_SUCCESS_LAST_CODE 0xFF // Bootloader sequence finished - -#endif /* BL_ERRORCODES_PUBLIC_H */ diff --git a/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_syscall_public.h deleted file mode 100644 index 0c168a93b2..0000000000 --- a/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_syscall_public.h +++ /dev/null @@ -1,416 +0,0 @@ -/***************************************************************************** - * - * Copyright (c) 2019, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -#ifndef _BL_SYSCALL_PUBLIC_H_ -#define _BL_SYSCALL_PUBLIC_H_ - -#include -#include - -#define SVC_EXIT 0x00 -#define SVC_MAP_USER_STACK 0x01 -#define SVC_DEBUG_PRINT 0x06 -#define SVC_MODEXP 0x0C -#define SVC_RSAPSS_VERIFY 0x0D -#define SVC_DEBUG_PRINT_EX 0x1A -#define SVC_WAIT_10NS_MULTIPLE 0x1B -#define SVC_GET_BOOT_MODE 0x1C -#define SVC_DELAY_IN_MICRO_SECONDS 0x2F -#define SVC_GET_SPI_INFO 0x35 -#define SVC_MAP_FCH_IO_DEVICE 0x36 -#define SVC_UNMAP_FCH_IO_DEVICE 0x37 -#define SVC_MAP_SPIROM_DEVICE 0x38 -#define SVC_UNMAP_SPIROM_DEVICE 0x39 -#define SVC_UPDATE_PSP_BIOS_DIR 0x40 -#define SVC_COPY_DATA_FROM_UAPP 0x41 -#define SVC_READ_TIMER_VAL 0x42 -#define SVC_RESET_SYSTEM 0x43 -#define SVC_WRITE_POSTCODE 0x44 -#define SVC_GET_MAX_WORKBUF_SIZE 0x45 -#define SVC_SHA 0x46 -#define SVC_RSAPKCS_VERIFY 0x47 - -/* Bit definitions for the psp_info field in the PSP transfer_info_struct */ -#define PSP_INFO_PRODUCTION_MODE 0x00000001UL -#define PSP_INFO_PRODUCTION_SILICON 0x00000002UL -#define PSP_INFO_VALID 0x80000000UL - -struct mod_exp_params { - char *pExponent; // Exponent address - unsigned int ExpSize; // Exponent size in bytes - char *pModulus; // Modulus address - unsigned int ModulusSize; // Modulus size in bytes - char *pMessage; // Message address, same size as ModulusSize - char *pOutput; // Output address; Must be big enough to hold the - // data of ModulusSize -}; - -struct rsapss_verify_params { - char *pHash; // Message digest to verify the RSA signature - unsigned int HashLen; // hash length in bytes - char *pModulus; // Modulus address - unsigned int ModulusSize; // Modulus length in bytes - char *pExponent; // Exponent address - unsigned int ExpSize; // Exponent length in bytes - char *pSig; // Signature to be verified, same size as ModulusSize -}; - -struct rsapkcs_verify_params { - char *pHash; // Message digest to verify the RSA signature - unsigned int HashLen; // hash length in bytes - char *pModulus; // Modulus address - unsigned int ModulusSize; // Modulus length in bytes - char *pExponent; // Exponent address - unsigned int ExpSize; // Exponent length in bytes - char *pSig; // Signature to be verified, same size as ModulusSize -}; - -enum psp_boot_mode { - PSP_BOOT_MODE_S0 = 0x0, - PSP_BOOT_MODE_S0i3_RESUME = 0x1, - PSP_BOOT_MODE_S3_RESUME = 0x2, - PSP_BOOT_MODE_S4 = 0x3, - PSP_BOOT_MODE_S5_COLD = 0x4, - PSP_BOOT_MODE_S5_WARM = 0x5, -}; - -enum fch_io_device { - FCH_IO_DEVICE_SPI, - FCH_IO_DEVICE_I2C, - FCH_IO_DEVICE_GPIO, - FCH_IO_DEVICE_ESPI, - FCH_IO_DEVICE_IOMUX, - FCH_IO_DEVICE_MISC, - FCH_IO_DEVICE_AOAC, - FCH_IO_DEVICE_IOPORT, - - FCH_IO_DEVICE_END, -}; - -/* Svc_UpdatePspBiosDir can be used to GET or SET the PSP or BIOS directory - * offsets. This enum is used to specify whether it is a GET or SET operation. - */ -enum dir_offset_operation { - DIR_OFFSET_GET = 0x0, - DIR_OFFSET_SET, - DIR_OFFSET_OPERATION_MAX -}; - -enum fch_i2c_controller_id { - FCH_I2C_CONTROLLER_ID_2 = 2, - FCH_I2C_CONTROLLER_ID_3 = 3, - FCH_I2C_CONTROLLER_ID_4 = 4, - FCH_I2C_CONTROLLER_ID_MAX, -}; - -enum uapp_copybuf { - UAPP_COPYBUF_CHROME_WORKBUF = 0x0, - UAPP_COPYBUF_MAX = 0x1, -}; - -struct spirom_info { - void *SpiBiosSysHubBase; - void *SpiBiosSmnBase; - uint32_t SpiBiosSize; -}; - -enum psp_timer_type { - PSP_TIMER_TYPE_CHRONO = 0, - PSP_TIMER_TYPE_RTC = 1, - PSP_TIMER_TYPE_MAX = 2, -}; - -enum reset_type { - RESET_TYPE_COLD = 0, - RESET_TYPE_WARM = 1, - RESET_TYPE_MAX = 2, -}; - -/* SHA types same as ccp SHA type in crypto.h */ -enum sha_type { - SHA_TYPE_256, - SHA_TYPE_512 -}; - -/* All SHA operation supported */ -enum sha_operation_mode { - SHA_GENERIC -}; - -/* SHA Supported Data Structures */ -struct sha_generic_data { - enum sha_type SHAType; - uint8_t *Data; - uint32_t DataLen; - uint32_t DataMemType; - uint8_t *Digest; - uint32_t DigestLen; - uint8_t *IntermediateDigest; - uint32_t IntermediateMsgLen; - uint32_t Init; - uint32_t Eom; -}; - -/* - * Exit to the main Boot Loader. This does not return back to user application. - * - * Parameters: - * status - either Ok or error code defined by AGESA - */ -void svc_exit(uint32_t status); - -/* Maps buffer for stack usage. - * - * Parameters: - * start_addr - start address of the stack buffer - * end_addr - end of the stack buffer - * stack_va - [out] mapped stack Virtual Address - * - * Return value: BL_OK or error code - */ -uint32_t svc_map_user_stack(void *start_addr, - void *end_addr, void *stack_va); - -/* Print debug message into serial console. - * - * Parameters: - * string - null-terminated string - */ -void svc_debug_print(const char *string); - -/* Print 4 DWORD values in hex to serial console - * - * Parameters: - * dword0...dword3 - 32-bit DWORD to print - */ -void svc_debug_print_ex(uint32_t dword0, - uint32_t dword1, uint32_t dword2, uint32_t dword3); - -/* Waits in a blocking call for multiples of 10ns (100MHz timer) before returning - * - * Parameters: - * multiple - The number of multiples of 10ns to wait - * - * Return value: BL_OK, or BL_ERR_TIMER_PARAM_OVERFLOW - */ -uint32_t svc_wait_10ns_multiple(uint32_t multiple); - -/* Description - Returns the current boot mode from the enum psp_boot_mode found in - * bl_public.h. - * - * Inputs - boot_mode - Output parameter passed in R0 - * - * Outputs - The boot mode in boot_mode. - * See Return Values. - * - * Return Values - BL_OK - * BL_ERR_NULL_PTR - * Other BL_ERRORs lofted up from called functions - */ -uint32_t svc_get_boot_mode(uint32_t *boot_mode); - -/* Add delay in micro seconds - * - * Parameters: - * delay - required delay value in microseconds - * - * Return value: NONE - */ -void svc_delay_in_usec(uint32_t delay); - -/* Get the SPI-ROM information - * - * Parameters: - * spi_rom_iInfo - SPI-ROM information - * - * Return value: BL_OK or error code - */ -uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info); - -/* Map the FCH IO device register space (SPI/I2C/GPIO/eSPI/etc...) - * - * Parameters: - * io_device - ID for respective FCH IO controller register space to be mapped - * arg1 - Based on IODevice ID, interpretation of this argument changes. - * arg2 - Based on IODevice ID, interpretation of this argument changes. - * io_device_axi_addr - AXI address for respective FCH IO device register space - * - * Return value: BL_OK or error code - */ -uint32_t svc_map_fch_dev(enum fch_io_device io_device, - uint32_t arg1, uint32_t arg2, void **io_device_axi_addr); - -/* Unmap the FCH IO device register space mapped earlier using Svc_MapFchIODevice() - * - * Parameters: - * io_device - ID for respective FCH IO controller register space to be unmapped - * io_device_addr - AXI address for respective FCH IO device register space - * - * Return value: BL_OK or error code - */ -uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, - void *io_device_axi_addr); - -/* Map the SPIROM FLASH device address space - * - * Parameters: - * SpiRomAddr - Address in SPIROM tobe mapped (SMN based) - * size - Size to be mapped - * pSpiRomAddrAxi - Mapped address in AXI space - * - * Return value: BL_OK or error code - */ -uint32_t svc_map_spi_rom(void *spi_rom_addr, - uint32_t size, void **spi_rom_axi_addr); - -/* Unmap the SPIROM FLASH device address space mapped earlier using Svc_MapSpiRomDevice() - * - * Parameters: - * pSpiRomAddrAxi - Address in AXI address space previously mapped - * - * Return value: BL_OK or error code - */ -uint32_t svc_unmap_spi_rom(void *spi_rom_addr); - -/* Updates the offset at which PSP or BIOS Directory can be found in the - * SPI flash - * - * Parameters: - * psp_dir_offset - [in/out] Offset at which PSP Directory can be - * found in the SPI Flash. Same pointer is used - * to return the offset in case of GET operation - * bios_dir_offset - [in/out] Offset at which BIOS Directory can be - * found in the SPI Flash. Same pointer is used - * to return the offset in case of GET operation - * operation - [in] Specifies whether this call is used for - * getting or setting the offset. - * - * Return value: BL_OK or error code - */ -uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, - uint32_t *bios_dir_offset, enum dir_offset_operation operation); - -/* Copies the data that is shared by verstage to the PSP BL owned memory - * - * Parameters: - * type - enum - * address - Address in UAPP controlled/owned memory - * size - Total size of memory to copy (max 16Kbytes) - */ -uint32_t svc_save_uapp_data(enum uapp_copybuf type, void *address, - uint32_t size); - -/* - * Read timer raw (currently CHRONO and RTC) value - * - * Parameters: - * Type - Type of timer UAPP would like to read from - * (currently CHRONO and RTC) - * counter_value - [out] return the raw counter value read from - * RTC or CHRONO_LO/HI counter register - */ -uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value ); - -/* - * Reset the system - * - * Parameters: - * reset_type - Cold or Warm reset - */ -uint32_t svc_reset_system(enum reset_type reset_type); - -/* - * Write postcode to Port-80 - * - * Parameters: - * postcode - Postcode value to be written on port-80h - */ -uint32_t svc_write_postcode(uint32_t postcode); - -/* - * Get the max size of workbuf memory supported by PSP BL - * - * Parameters: - * size - [out] Max size supported by PSP BL for workbuf copy - */ -uint32_t svc_get_max_workbuf_size(uint32_t *size); - -/* - * Generic SHA call for SHA, SHA_OTP, SHA_HMAC - */ -uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode); - -/* - * RSA PSS Verification of signature and data - * - * Parameters: - * rsapss_verify_params - Pointer to RSA PSS parameters - * - * Return value: BL_OK or error code - */ -uint32_t svc_rsa_pss_verify(const struct rsapss_verify_params *params); - -/* - * RSA PKCS Verification of signature and data - * - * Parameters: - * struct rsapkcs_verify_params - Pointer to RSA PKCS parameters - * - * Return value: BL_OK or error code - */ -uint32_t svc_rsa_pkcs_verify(const struct rsapkcs_verify_params *params); - -/* Calculate ModEx - * - * Parameters: - * mod_exp_param - ModExp parameters - * - * Return value: BL_OK or error code - */ -uint32_t svc_modexp(struct mod_exp_params *mod_exp_param); - -/* - * Copies the data from source to destination using ccp - * - * Parameters: - * Source Address - SPI ROM offset - * Destination Address - Address in Verstage memory - * Size - Total size to copy - * - * Return value: BL_OK or error code - */ -static inline uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size) -{ - return BL_ERR_UNSUPPORTED_PLATFORM; -} - -/* C entry point for the Bootloader Userspace Application */ -void Main(void); - -#endif /* _BL_SYSCALL__PUBLIC_H_ */ diff --git a/src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_end.S new file mode 100644 index 0000000000..db6556cb0a --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_end.S @@ -0,0 +1,44 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +.arm +.global LastBytes +.section PSP_FOOTER_DATA, "a", %note +.balign 64 + +// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte +// in size so that the binary size is multiple of 64 bytes. +// +LastBytes: + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + +.end diff --git a/src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_header.inc b/src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_header.inc new file mode 100644 index 0000000000..35c906a445 --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_header.inc @@ -0,0 +1,64 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +.global LastBytes + +#define BL_UAPP_START_ADDRESS 0x00036000 +#define SIZE_OF_THIS_HEADER 256 +#define SIZE_OF_PSP_END 64 +#define IMAGE_SIZE LastBytes + SIZE_OF_PSP_END - BL_UAPP_START_ADDRESS - SIZE_OF_THIS_HEADER + +#define IMAGE_VERSION 0x01,0x00,0x00,0x00 +#define FW_TYPE 0x52 + + + // 256 byte binary header + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 // nonce + .byte 0x00,0x00,0x00,0x00 // header version + .word IMAGE_SIZE + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte IMAGE_VERSION + .byte 0x00,0x00,0x00,0x00 // APU Family ID + .byte 0x00,0x01,0x00,0x00 // Load Address + .byte 0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte FW_TYPE + .byte 0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 diff --git a/src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_startup.S b/src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_startup.S new file mode 100644 index 0000000000..f5f1e18e6c --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_startup.S @@ -0,0 +1,71 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +#include +#include + + .global Main + .global _psp_vs_start + + .global PSP_VERSTAGE_STACK_END + +.arm +.text +.section "PSP_HEADER_DATA", "aw", %note + +//============================================================================== +// First 256 bytes of the binary image contain the header. +// Executable code starts from offset 0x100. +//============================================================================== +#include "bl_uapp_header.inc" + +//============================================================================== +// This is entry point to the binary which is called by main Boot Loader. +//============================================================================== + +ENTRY(_psp_vs_start) + + ldr sp, =PSP_VERSTAGE_STACK_END // stack pointer + + // Return value contains Virtual Address of mapped stack + // + ldr lr, =ShouldNotBeReached // return address + + ldr r2, =Main // pass control to verstage main function + blx r2 + +// This point should not be reached. The Main() function should return +// to main BL using Svc_Exit(). +// +ShouldNotBeReached: + mov r0, #BL_ERR_GENERIC // Returned from Main + svc #0x0 // SVC_EXIT + +ENDPROC(_psp_vs_start) +.end diff --git a/src/vendorcode/amd/psp_verstage/cezanne/include/bl_uapp/bl_errorcodes_public.h b/src/vendorcode/amd/psp_verstage/cezanne/include/bl_uapp/bl_errorcodes_public.h new file mode 100644 index 0000000000..4fa9a3371f --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/cezanne/include/bl_uapp/bl_errorcodes_public.h @@ -0,0 +1,37 @@ +/***************************************************************************** + * + * Copyright (c) 2020, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *******************************************************************************/ + +#ifndef BL_ERRORCODES_PUBLIC_H +#define BL_ERRORCODES_PUBLIC_H + +/* Bootloader Return Codes, Error only (0x00 through 0x9F) */ +#define BL_OK 0x00 // General - Success +#define BL_ERR_GENERIC 0x01 // Generic Error Code + +#endif /* BL_ERRORCODES_PUBLIC_H */ diff --git a/src/vendorcode/amd/psp_verstage/cezanne/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/psp_verstage/cezanne/include/bl_uapp/bl_syscall_public.h new file mode 100644 index 0000000000..d88bfe1801 --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/cezanne/include/bl_uapp/bl_syscall_public.h @@ -0,0 +1,349 @@ +/***************************************************************************** + * + * Copyright (c) 2020, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +#ifndef _BL_SYSCALL_PUBLIC_H_ +#define _BL_SYSCALL_PUBLIC_H_ + +#include + +#define SVC_EXIT 0x00 +#define SVC_ENTER 0x02 +#define SVC_DEBUG_PRINT 0x06 +#define SVC_MODEXP 0x0C +#define SVC_DEBUG_PRINT_EX 0x1A +#define SVC_GET_BOOT_MODE 0x1C +#define SVC_DELAY_IN_MICRO_SECONDS 0x2F +#define SVC_GET_SPI_INFO 0x60 +#define SVC_MAP_SPIROM_DEVICE 0x61 +#define SVC_UNMAP_SPIROM_DEVICE 0x62 +#define SVC_MAP_FCH_IO_DEVICE 0x63 +#define SVC_UNMAP_FCH_IO_DEVICE 0x64 +#define SVC_UPDATE_PSP_BIOS_DIR 0x65 +#define SVC_COPY_DATA_FROM_UAPP 0x66 +#define SVC_RESET_SYSTEM 0x67 +#define SVC_READ_TIMER_VAL 0x68 +#define SVC_SHA 0x69 +#define SVC_CCP_DMA 0x6A +#define SVC_SET_PLATFORM_BOOT_MODE 0x6C +#define SVC_WRITE_POSTCODE 0x6D + +struct mod_exp_params { + char *pExponent; // Exponent address + unsigned int ExpSize; // Exponent size in bytes + char *pModulus; // Modulus address + unsigned int ModulusSize; // Modulus size in bytes + char *pMessage; // Message address, same size as ModulusSize + char *pOutput; // Output address; Must be big enough to hold the + // data of ModulusSize +}; + +enum psp_boot_mode { + PSP_BOOT_MODE_S0 = 0x0, + PSP_BOOT_MODE_S0i3_RESUME = 0x1, + PSP_BOOT_MODE_S3_RESUME = 0x2, + PSP_BOOT_MODE_S4 = 0x3, + PSP_BOOT_MODE_S5_COLD = 0x4, + PSP_BOOT_MODE_S5_WARM = 0x5, +}; + +enum reset_type +{ + RESET_TYPE_COLD = 0, + RESET_TYPE_WARM = 1, + RESET_TYPE_MAX = 2, +}; + +enum fch_io_device { + FCH_IO_DEVICE_SPI, + FCH_IO_DEVICE_I2C, + FCH_IO_DEVICE_GPIO, + FCH_IO_DEVICE_ESPI, + FCH_IO_DEVICE_IOMUX, + FCH_IO_DEVICE_MISC, + FCH_IO_DEVICE_AOAC, + FCH_IO_DEVICE_IOPORT, + FCH_IO_DEVICE_UART, + + FCH_IO_DEVICE_END, +}; + +enum fch_uart_id { + FCH_UART_ID_0 = 0, + FCH_UART_ID_1 = 1, + FCH_UART_ID_MAX, +}; + +enum fch_i2c_controller_id { + FCH_I2C_CONTROLLER_ID_0 = 0, + FCH_I2C_CONTROLLER_ID_1 = 1, + FCH_I2C_CONTROLLER_ID_2 = 2, + FCH_I2C_CONTROLLER_ID_3 = 3, + FCH_I2C_CONTROLLER_ID_MAX, +}; + +struct spirom_info { + void *SpiBiosSysHubBase; + void *SpiBiosSmnBase; + uint32_t SpiBiosSize; +}; + +enum psp_timer_type { + PSP_TIMER_TYPE_CHRONO = 0, + PSP_TIMER_TYPE_SECURE_RTC = 1, + PSP_TIMER_TYPE_MAX = 2, +}; + +/* SHA types same as ccp SHA type in crypto.h */ +enum sha_type { + SHA_TYPE_256, + SHA_TYPE_384 +}; + +/* All SHA operation supported */ +enum sha_operation_mode { + SHA_GENERIC +}; + +/* SHA Supported Data Structures */ +struct sha_generic_data { + enum sha_type SHAType; + uint8_t *Data; + uint32_t DataLen; + uint32_t DataMemType; + uint8_t *Digest; + uint32_t DigestLen; + uint8_t *IntermediateDigest; + uint32_t IntermediateMsgLen; + uint32_t Init; + uint32_t Eom; +}; + +/* + * This is state that PSP manages internally. + * We only report BOOT_MODE_DEVELOPER or BOOT_MODE_PRODUCTION in verstage. + */ +enum chrome_platform_boot_mode +{ + NON_CHROME_BOOK_BOOT_MODE = 0x0, + CHROME_BOOK_BOOT_MODE_UNSIGNED_VERSTAGE = 0x1, + CHROME_BOOK_BOOT_MODE_PRODUCTION = 0x2, + CHROME_BOOK_BOOT_MODE_DEVELOPER = 0x3, + CHROME_BOOK_BOOT_MODE_TYPE_MAX_LIMIT = 0x4, // used for boundary check +}; + +/* + * Exit to the main Boot Loader. This does not return back to user application. + * + * Parameters: + * status - either Ok or error code defined by AGESA + */ +void svc_exit(uint32_t status); + +/* Print debug message into serial console. + * + * Parameters: + * string - null-terminated string + */ +void svc_debug_print(const char *string); + +/* Print 4 DWORD values in hex to serial console + * + * Parameters: + * dword0...dword3 - 32-bit DWORD to print + */ +void svc_debug_print_ex(uint32_t dword0, + uint32_t dword1, uint32_t dword2, uint32_t dword3); + +/* Description - Returns the current boot mode from the enum psp_boot_mode found in + * bl_public.h. + * + * Inputs - boot_mode - Output parameter passed in R0 + * + * Outputs - The boot mode in boot_mode. + * See Return Values. + * + * Return Values - BL_OK + * BL_ERR_NULL_PTR + * Other BL_ERRORs lofted up from called functions + */ +uint32_t svc_get_boot_mode(uint32_t *boot_mode); + +/* Add delay in micro seconds + * + * Parameters: + * delay - required delay value in microseconds + * + * Return value: NONE + */ +void svc_delay_in_usec(uint32_t delay); + +/* Get the SPI-ROM information + * + * Parameters: + * spi_rom_iInfo - SPI-ROM information + * + * Return value: BL_OK or error code + */ +uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info); + +/* Map the FCH IO device register space (SPI/I2C/GPIO/eSPI/etc...) + * + * Parameters: + * io_device - ID for respective FCH IO controller register space to be mapped + * arg1 - Based on IODevice ID, interpretation of this argument changes. + * arg2 - Based on IODevice ID, interpretation of this argument changes. + * io_device_axi_addr - AXI address for respective FCH IO device register space + * + * Return value: BL_OK or error code + */ +uint32_t svc_map_fch_dev(enum fch_io_device io_device, + uint32_t arg1, uint32_t arg2, void **io_device_axi_addr); + +/* Unmap the FCH IO device register space mapped earlier using Svc_MapFchIODevice() + * + * Parameters: + * io_device - ID for respective FCH IO controller register space to be unmapped + * io_device_addr - AXI address for respective FCH IO device register space + * + * Return value: BL_OK or error code + */ +uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, + void *io_device_axi_addr); + +/* Map the SPIROM FLASH device address space + * + * Parameters: + * SpiRomAddr - Address in SPIROM tobe mapped (SMN based) + * size - Size to be mapped + * pSpiRomAddrAxi - Mapped address in AXI space + * + * Return value: BL_OK or error code + */ +uint32_t svc_map_spi_rom(void *spi_rom_addr, + uint32_t size, void **spi_rom_axi_addr); + +/* Unmap the SPIROM FLASH device address space mapped earlier using Svc_MapSpiRomDevice() + * + * Parameters: + * pSpiRomAddrAxi - Address in AXI address space previously mapped + * + * Return value: BL_OK or error code + */ +uint32_t svc_unmap_spi_rom(void *spi_rom_addr); + +/* Updates the offset at which PSP or BIOS Directory can be found in the + * SPI flash + * + * Parameters: + * psp_dir_offset - [in/out] Offset at which PSP Directory can be + * found in the SPI Flash. Same pointer is used + * to return the offset in case of GET operation + * bios_dir_offset - [in/out] Offset at which BIOS Directory can be + * found in the SPI Flash. Same pointer is used + * to return the offset in case of GET operation + * + * Return value: BL_OK or error code + */ +uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, + uint32_t *bios_dir_offset); + +/* Copies the data that is shared by verstage to the PSP BL owned memory + * + * Parameters: + * address - Address in UAPP controlled/owned memory + * size - Total size of memory to copy (max 16Kbytes) + */ +uint32_t svc_save_uapp_data(void *address, uint32_t size); + +/* + * Read timer raw (currently CHRONO and RTC) value + * + * Parameters: + * type - [in] Type of timer UAPP would like to read from + * (currently CHRONO and RTC) + * counter_value - [out] return the raw counter value read from + * RTC or CHRONO_LO/HI counter register + -----------------------------------------------------------------------------*/ +uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value); + +/* + * Reset the system + * + * Parameters: + * reset_type - Cold or Warm reset + */ +uint32_t svc_reset_system(enum reset_type reset_type); + +/* + * Write postcode to Port-80 + * + * Parameters: + * postcode - Postcode value to be written on port-80h + */ +uint32_t svc_write_postcode(uint32_t postcode); + +/* + * Generic SHA call for SHA, SHA_OTP, SHA_HMAC + */ +uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode); + +/* + * Calculate ModEx + * + * Parameters: + * mod_exp_param - ModExp parameters + * + * Return value: BL_OK or error code + */ +uint32_t svc_modexp(struct mod_exp_params *mod_exp_param); + +/* + * Copies the data from source to destination using ccp + * + * Parameters: + * Source Address - SPI ROM offset + * Destination Address - Address in Verstage memory + * Size - Total size to copy + * + * Return value: BL_OK or error code + */ +uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size); + +/* + * Get the Platform boot mode from verstage. Production or developer + * + * Parameters: + * - boot mode + -----------------------------------------------------------------------------*/ +uint32_t svc_set_platform_boot_mode(enum chrome_platform_boot_mode boot_mode); + +/* C entry point for the Bootloader Userspace Application */ +void Main(void); + +#endif /* _BL_SYSCALL__PUBLIC_H_ */ diff --git a/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_end.S new file mode 100644 index 0000000000..db6556cb0a --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_end.S @@ -0,0 +1,44 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +.arm +.global LastBytes +.section PSP_FOOTER_DATA, "a", %note +.balign 64 + +// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte +// in size so that the binary size is multiple of 64 bytes. +// +LastBytes: + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + +.end diff --git a/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_header.inc b/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_header.inc new file mode 100644 index 0000000000..bb90f67817 --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_header.inc @@ -0,0 +1,64 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +.global LastBytes + +#define BL_UAPP_START_ADDRESS 0x00036000 +#define SIZE_OF_THIS_HEADER 256 +#define SIZE_OF_PSP_END 64 +#define IMAGE_SIZE LastBytes + SIZE_OF_PSP_END - BL_UAPP_START_ADDRESS - SIZE_OF_THIS_HEADER + +#define IMAGE_VERSION 0x01,0x00,0x00,0x00 +#define FW_TYPE 0x52 + + + // 256 byte binary header + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 // nonce + .byte 0x00,0x00,0x00,0x00 // header version + .word IMAGE_SIZE + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x49,0x01,0x00,0x00,0x00,0x00,0x00,0x00 + .byte IMAGE_VERSION + .byte 0x00,0x00,0x00,0x00 // APU Family ID + .byte 0x00,0x01,0x00,0x00 // Load Address + .byte 0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte FW_TYPE + .byte 0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 diff --git a/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_startup.S b/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_startup.S new file mode 100644 index 0000000000..f5f1e18e6c --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_startup.S @@ -0,0 +1,71 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +#include +#include + + .global Main + .global _psp_vs_start + + .global PSP_VERSTAGE_STACK_END + +.arm +.text +.section "PSP_HEADER_DATA", "aw", %note + +//============================================================================== +// First 256 bytes of the binary image contain the header. +// Executable code starts from offset 0x100. +//============================================================================== +#include "bl_uapp_header.inc" + +//============================================================================== +// This is entry point to the binary which is called by main Boot Loader. +//============================================================================== + +ENTRY(_psp_vs_start) + + ldr sp, =PSP_VERSTAGE_STACK_END // stack pointer + + // Return value contains Virtual Address of mapped stack + // + ldr lr, =ShouldNotBeReached // return address + + ldr r2, =Main // pass control to verstage main function + blx r2 + +// This point should not be reached. The Main() function should return +// to main BL using Svc_Exit(). +// +ShouldNotBeReached: + mov r0, #BL_ERR_GENERIC // Returned from Main + svc #0x0 // SVC_EXIT + +ENDPROC(_psp_vs_start) +.end diff --git a/src/vendorcode/amd/psp_verstage/common/include/bl_uapp/bl_errorcodes_public.h b/src/vendorcode/amd/psp_verstage/common/include/bl_uapp/bl_errorcodes_public.h new file mode 100644 index 0000000000..4fa9a3371f --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/common/include/bl_uapp/bl_errorcodes_public.h @@ -0,0 +1,37 @@ +/***************************************************************************** + * + * Copyright (c) 2020, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *******************************************************************************/ + +#ifndef BL_ERRORCODES_PUBLIC_H +#define BL_ERRORCODES_PUBLIC_H + +/* Bootloader Return Codes, Error only (0x00 through 0x9F) */ +#define BL_OK 0x00 // General - Success +#define BL_ERR_GENERIC 0x01 // Generic Error Code + +#endif /* BL_ERRORCODES_PUBLIC_H */ diff --git a/src/vendorcode/amd/psp_verstage/glinda/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/psp_verstage/glinda/include/bl_uapp/bl_syscall_public.h new file mode 100644 index 0000000000..0516e6315d --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/glinda/include/bl_uapp/bl_syscall_public.h @@ -0,0 +1,377 @@ +/***************************************************************************** + * + * Copyright (c) 2022, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +/* TODO: Update for Glinda */ + +#ifndef _BL_SYSCALL_PUBLIC_H_ +#define _BL_SYSCALL_PUBLIC_H_ + +#include + +#define SVC_EXIT 0x00 +#define SVC_ENTER 0x02 +#define SVC_VERSTAGE_CMD 0x3A + +enum verstage_cmd_id { + CMD_SHA = 1, + CMD_MODEXP, + CMD_DEBUG_PRINT, + CMD_DEBUG_PRINT_EX, + CMD_UPDATE_PSP_BIOS_DIR, + CMD_GET_SPI_INFO, + CMD_MAP_SPIROM_DEVICE, + CMD_UNMAP_SPIROM_DEVICE, + CMD_READ_TIMER_VAL, + CMD_DELAY_IN_MICRO_SECONDS, + CMD_RESET_SYSTEM, + CMD_GET_BOOT_MODE, + CMD_COPY_DATA_FROM_UAPP, + CMD_MAP_FCH_IO_DEVICE, + CMD_UNMAP_FCH_IO_DEVICE, + CMD_CCP_DMA, + CMD_SET_PLATFORM_BOOT_MODE, + CMD_SET_FW_HASH_TABLE, +}; + +struct mod_exp_params { + char *pExponent; // Exponent address + unsigned int ExpSize; // Exponent size in bytes + char *pModulus; // Modulus address + unsigned int ModulusSize; // Modulus size in bytes + char *pMessage; // Message address, same size as ModulusSize + char *pOutput; // Output address; Must be big enough to hold the + // data of ModulusSize +}; + +enum psp_boot_mode { + PSP_BOOT_MODE_S0 = 0x0, + PSP_BOOT_MODE_S0i3_RESUME = 0x1, + PSP_BOOT_MODE_S3_RESUME = 0x2, + PSP_BOOT_MODE_S4 = 0x3, + PSP_BOOT_MODE_S5_COLD = 0x4, + PSP_BOOT_MODE_S5_WARM = 0x5, +}; + +enum reset_type +{ + RESET_TYPE_COLD = 0, + RESET_TYPE_WARM = 1, + RESET_TYPE_MAX = 2, +}; + +enum fch_io_device { + FCH_IO_DEVICE_SPI, + FCH_IO_DEVICE_I2C, + FCH_IO_DEVICE_GPIO, + FCH_IO_DEVICE_ESPI, + FCH_IO_DEVICE_IOMUX, + FCH_IO_DEVICE_MISC, + FCH_IO_DEVICE_AOAC, + FCH_IO_DEVICE_IOPORT, + FCH_IO_DEVICE_END, +}; + +enum fch_i2c_controller_id { + FCH_I2C_CONTROLLER_ID_0 = 0, + FCH_I2C_CONTROLLER_ID_1 = 1, + FCH_I2C_CONTROLLER_ID_2 = 2, + FCH_I2C_CONTROLLER_ID_3 = 3, + FCH_I2C_CONTROLLER_ID_MAX, +}; + +struct spirom_info { + void *SpiBiosSysHubBase; + void *SpiBiosSmnBase; + uint32_t SpiBiosSize; +}; + +enum psp_timer_type { + PSP_TIMER_TYPE_CHRONO = 0, + PSP_TIMER_TYPE_SECURE_RTC = 1, + PSP_TIMER_TYPE_MAX = 2, +}; + +/* SHA types same as ccp SHA type in crypto.h */ +enum sha_type { + SHA_TYPE_256, + SHA_TYPE_384 +}; + +/* All SHA operation supported */ +enum sha_operation_mode { + SHA_GENERIC +}; + +/* SHA Supported Data Structures */ +struct sha_generic_data { + enum sha_type SHAType; + uint8_t *Data; + uint32_t DataLen; + uint32_t DataMemType; + uint8_t *Digest; + uint32_t DigestLen; + uint8_t *IntermediateDigest; + uint32_t IntermediateMsgLen; + uint32_t Init; + uint32_t Eom; +}; + +/* + * This is state that PSP manages internally. + * We only report BOOT_MODE_DEVELOPER or BOOT_MODE_NORMAL in verstage. + */ +enum chrome_platform_boot_mode +{ + NON_CHROME_BOOK_BOOT_MODE = 0x0, + CHROME_BOOK_BOOT_MODE_UNSIGNED_VERSTAGE = 0x1, + CHROME_BOOK_BOOT_MODE_NORMAL = 0x2, + CHROME_BOOK_BOOT_MODE_DEVELOPER = 0x3, + CHROME_BOOK_BOOT_MODE_TYPE_MAX_LIMIT = 0x4, // used for boundary check +}; + +struct psp_fw_entry_hash_256 { + uint16_t fw_type; + uint16_t sub_type; + uint8_t sha[32]; +} __packed; + +struct psp_fw_entry_hash_384 { + uint16_t fw_type; + uint16_t sub_type; + uint8_t sha[48]; +} __packed; + +struct psp_fw_hash_table { + uint16_t version; // Version of psp_fw_hash_table, Start with 0. + uint16_t no_of_entries_256; + uint16_t no_of_entries_384; + struct psp_fw_entry_hash_256 *fw_hash_256; + struct psp_fw_entry_hash_384 *fw_hash_384; +} __packed; + +/* + * Exit to the main Boot Loader. This does not return back to user application. + * + * Parameters: + * status - either Ok or error code defined by AGESA + */ +void svc_exit(uint32_t status); + +/* Print debug message into serial console. + * + * Parameters: + * string - null-terminated string + */ +void svc_debug_print(const char *string); + +/* Print 4 DWORD values in hex to serial console + * + * Parameters: + * dword0...dword3 - 32-bit DWORD to print + */ +void svc_debug_print_ex(uint32_t dword0, + uint32_t dword1, uint32_t dword2, uint32_t dword3); + +/* Description - Returns the current boot mode from the enum psp_boot_mode found in + * bl_public.h. + * + * Inputs - boot_mode - Output parameter passed in R0 + * + * Outputs - The boot mode in boot_mode. + * See Return Values. + * + * Return Values - BL_OK + * BL_ERR_NULL_PTR + * Other BL_ERRORs lofted up from called functions + */ +uint32_t svc_get_boot_mode(uint32_t *boot_mode); + +/* Add delay in micro seconds + * + * Parameters: + * delay - required delay value in microseconds + * + * Return value: NONE + */ +void svc_delay_in_usec(uint32_t delay); + +/* Get the SPI-ROM information + * + * Parameters: + * spi_rom_iInfo - SPI-ROM information + * + * Return value: BL_OK or error code + */ +uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info); + +/* Map the FCH IO device register space (SPI/I2C/GPIO/eSPI/etc...) + * + * Parameters: + * io_device - ID for respective FCH IO controller register space to be mapped + * arg1 - Based on IODevice ID, interpretation of this argument changes. + * arg2 - Based on IODevice ID, interpretation of this argument changes. + * io_device_axi_addr - AXI address for respective FCH IO device register space + * + * Return value: BL_OK or error code + */ +uint32_t svc_map_fch_dev(enum fch_io_device io_device, + uint32_t arg1, uint32_t arg2, void **io_device_axi_addr); + +/* Unmap the FCH IO device register space mapped earlier using Svc_MapFchIODevice() + * + * Parameters: + * io_device - ID for respective FCH IO controller register space to be unmapped + * io_device_addr - AXI address for respective FCH IO device register space + * + * Return value: BL_OK or error code + */ +uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, + void *io_device_axi_addr); + +/* Map the SPIROM FLASH device address space + * + * Parameters: + * SpiRomAddr - Address in SPIROM tobe mapped (SMN based) + * size - Size to be mapped + * pSpiRomAddrAxi - Mapped address in AXI space + * + * Return value: BL_OK or error code + */ +uint32_t svc_map_spi_rom(void *spi_rom_addr, + uint32_t size, void **spi_rom_axi_addr); + +/* Unmap the SPIROM FLASH device address space mapped earlier using Svc_MapSpiRomDevice() + * + * Parameters: + * pSpiRomAddrAxi - Address in AXI address space previously mapped + * + * Return value: BL_OK or error code + */ +uint32_t svc_unmap_spi_rom(void *spi_rom_addr); + +/* Updates the offset at which PSP or BIOS Directory can be found in the + * SPI flash + * + * Parameters: + * psp_dir_offset - [in/out] Offset at which PSP Directory can be + * found in the SPI Flash. Same pointer is used + * to return the offset in case of GET operation + * bios_dir_offset - [in/out] Offset at which BIOS Directory can be + * found in the SPI Flash. Same pointer is used + * to return the offset in case of GET operation + * + * Return value: BL_OK or error code + */ +uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, + uint32_t *bios_dir_offset); + +/* Copies the data that is shared by verstage to the PSP BL owned memory + * + * Parameters: + * address - Address in UAPP controlled/owned memory + * size - Total size of memory to copy (max 16Kbytes) + */ +uint32_t svc_save_uapp_data(void *address, uint32_t size); + +/* + * Read timer raw (currently CHRONO and RTC) value + * + * Parameters: + * type - [in] Type of timer UAPP would like to read from + * (currently CHRONO and RTC) + * counter_value - [out] return the raw counter value read from + * RTC or CHRONO_LO/HI counter register + -----------------------------------------------------------------------------*/ +uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value); + +/* + * Reset the system + * + * Parameters: + * reset_type - Cold or Warm reset + */ +uint32_t svc_reset_system(enum reset_type reset_type); + +/* + * Write postcode to Port-80 + * + * Parameters: + * postcode - Postcode value to be written on port-80h + */ +uint32_t svc_write_postcode(uint32_t postcode); + +/* + * Generic SHA call for SHA, SHA_OTP, SHA_HMAC + */ +uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode); + +/* + * Calculate ModEx + * + * Parameters: + * mod_exp_param - ModExp parameters + * + * Return value: BL_OK or error code + */ +uint32_t svc_modexp(struct mod_exp_params *mod_exp_param); + +/* + * Copies the data from source to destination using ccp + * + * Parameters: + * Source Address - SPI ROM offset + * Destination Address - Address in Verstage memory + * Size - Total size to copy + * + * Return value: BL_OK or error code + */ +uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size); + +/* + * Get the Platform boot mode from verstage. Normal or developer + * + * Parameters: + * - boot mode + -----------------------------------------------------------------------------*/ +uint32_t svc_set_platform_boot_mode(enum chrome_platform_boot_mode boot_mode); + +/* + * Set the PSP FW hash table. + * + * Parameters: + * - hash_table - Table of hash for each PSP binary signed against SoC chain of trust + * + * Return value: BL_OK or error code + */ +uint32_t svc_set_fw_hash_table(struct psp_fw_hash_table *hash_table); + +/* C entry point for the Bootloader Userspace Application */ +void Main(void); + +#endif /* _BL_SYSCALL__PUBLIC_H_ */ diff --git a/src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_end.S new file mode 100644 index 0000000000..db6556cb0a --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_end.S @@ -0,0 +1,44 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +.arm +.global LastBytes +.section PSP_FOOTER_DATA, "a", %note +.balign 64 + +// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte +// in size so that the binary size is multiple of 64 bytes. +// +LastBytes: + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + +.end diff --git a/src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_header.inc b/src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_header.inc new file mode 100644 index 0000000000..bb90f67817 --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_header.inc @@ -0,0 +1,64 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +.global LastBytes + +#define BL_UAPP_START_ADDRESS 0x00036000 +#define SIZE_OF_THIS_HEADER 256 +#define SIZE_OF_PSP_END 64 +#define IMAGE_SIZE LastBytes + SIZE_OF_PSP_END - BL_UAPP_START_ADDRESS - SIZE_OF_THIS_HEADER + +#define IMAGE_VERSION 0x01,0x00,0x00,0x00 +#define FW_TYPE 0x52 + + + // 256 byte binary header + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 // nonce + .byte 0x00,0x00,0x00,0x00 // header version + .word IMAGE_SIZE + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x49,0x01,0x00,0x00,0x00,0x00,0x00,0x00 + .byte IMAGE_VERSION + .byte 0x00,0x00,0x00,0x00 // APU Family ID + .byte 0x00,0x01,0x00,0x00 // Load Address + .byte 0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte FW_TYPE + .byte 0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 diff --git a/src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_startup.S b/src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_startup.S new file mode 100644 index 0000000000..f5f1e18e6c --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_startup.S @@ -0,0 +1,71 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +#include +#include + + .global Main + .global _psp_vs_start + + .global PSP_VERSTAGE_STACK_END + +.arm +.text +.section "PSP_HEADER_DATA", "aw", %note + +//============================================================================== +// First 256 bytes of the binary image contain the header. +// Executable code starts from offset 0x100. +//============================================================================== +#include "bl_uapp_header.inc" + +//============================================================================== +// This is entry point to the binary which is called by main Boot Loader. +//============================================================================== + +ENTRY(_psp_vs_start) + + ldr sp, =PSP_VERSTAGE_STACK_END // stack pointer + + // Return value contains Virtual Address of mapped stack + // + ldr lr, =ShouldNotBeReached // return address + + ldr r2, =Main // pass control to verstage main function + blx r2 + +// This point should not be reached. The Main() function should return +// to main BL using Svc_Exit(). +// +ShouldNotBeReached: + mov r0, #BL_ERR_GENERIC // Returned from Main + svc #0x0 // SVC_EXIT + +ENDPROC(_psp_vs_start) +.end diff --git a/src/vendorcode/amd/psp_verstage/mendocino/include/bl_uapp/bl_errorcodes_public.h b/src/vendorcode/amd/psp_verstage/mendocino/include/bl_uapp/bl_errorcodes_public.h new file mode 100644 index 0000000000..4fa9a3371f --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/mendocino/include/bl_uapp/bl_errorcodes_public.h @@ -0,0 +1,37 @@ +/***************************************************************************** + * + * Copyright (c) 2020, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *******************************************************************************/ + +#ifndef BL_ERRORCODES_PUBLIC_H +#define BL_ERRORCODES_PUBLIC_H + +/* Bootloader Return Codes, Error only (0x00 through 0x9F) */ +#define BL_OK 0x00 // General - Success +#define BL_ERR_GENERIC 0x01 // Generic Error Code + +#endif /* BL_ERRORCODES_PUBLIC_H */ diff --git a/src/vendorcode/amd/psp_verstage/mendocino/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/psp_verstage/mendocino/include/bl_uapp/bl_syscall_public.h new file mode 100644 index 0000000000..d09f39cec1 --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/mendocino/include/bl_uapp/bl_syscall_public.h @@ -0,0 +1,396 @@ +/***************************************************************************** + * + * Copyright (c) 2020, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +#ifndef _BL_SYSCALL_PUBLIC_H_ +#define _BL_SYSCALL_PUBLIC_H_ + +#include + +#define SVC_EXIT 0x00 +#define SVC_ENTER 0x02 +#define SVC_VERSTAGE_CMD 0x3A + +enum verstage_cmd_id { + CMD_SHA = 1, + CMD_MODEXP, + CMD_DEBUG_PRINT, + CMD_DEBUG_PRINT_EX, + CMD_UPDATE_PSP_BIOS_DIR, + CMD_GET_SPI_INFO, + CMD_MAP_SPIROM_DEVICE, + CMD_UNMAP_SPIROM_DEVICE, + CMD_READ_TIMER_VAL, + CMD_DELAY_IN_MICRO_SECONDS, + CMD_RESET_SYSTEM, + CMD_GET_BOOT_MODE, + CMD_COPY_DATA_FROM_UAPP, + CMD_MAP_FCH_IO_DEVICE, + CMD_UNMAP_FCH_IO_DEVICE, + CMD_CCP_DMA, + CMD_SET_PLATFORM_BOOT_MODE, + CMD_SET_FW_HASH_TABLE, + CMD_GET_PREV_BOOT_STATUS, + CMD_GET_HSP_SECURE_STATE, + CMD_WRITE_POSTCODE, +}; + +struct mod_exp_params { + char *pExponent; // Exponent address + unsigned int ExpSize; // Exponent size in bytes + char *pModulus; // Modulus address + unsigned int ModulusSize; // Modulus size in bytes + char *pMessage; // Message address, same size as ModulusSize + char *pOutput; // Output address; Must be big enough to hold the + // data of ModulusSize +}; + +enum psp_boot_mode { + PSP_BOOT_MODE_S0 = 0x0, + PSP_BOOT_MODE_S0i3_RESUME = 0x1, + PSP_BOOT_MODE_S3_RESUME = 0x2, + PSP_BOOT_MODE_S4 = 0x3, + PSP_BOOT_MODE_S5_COLD = 0x4, + PSP_BOOT_MODE_S5_WARM = 0x5, +}; + +enum reset_type +{ + RESET_TYPE_COLD = 0, + RESET_TYPE_WARM = 1, + RESET_TYPE_MAX = 2, +}; + +enum fch_io_device { + FCH_IO_DEVICE_SPI, + FCH_IO_DEVICE_I2C, + FCH_IO_DEVICE_GPIO, + FCH_IO_DEVICE_ESPI, + FCH_IO_DEVICE_IOMUX, + FCH_IO_DEVICE_MISC, + FCH_IO_DEVICE_AOAC, + FCH_IO_DEVICE_IOPORT, + FCH_IO_DEVICE_END, +}; + +enum fch_i2c_controller_id { + FCH_I2C_CONTROLLER_ID_0 = 0, + FCH_I2C_CONTROLLER_ID_1 = 1, + FCH_I2C_CONTROLLER_ID_2 = 2, + FCH_I2C_CONTROLLER_ID_3 = 3, + FCH_I2C_CONTROLLER_ID_MAX, +}; + +struct spirom_info { + void *SpiBiosSysHubBase; + void *SpiBiosSmnBase; + uint32_t SpiBiosSize; +}; + +enum psp_timer_type { + PSP_TIMER_TYPE_CHRONO = 0, + PSP_TIMER_TYPE_SECURE_RTC = 1, + PSP_TIMER_TYPE_MAX = 2, +}; + +/* SHA types same as ccp SHA type in crypto.h */ +enum sha_type { + SHA_TYPE_256, + SHA_TYPE_384 +}; + +/* All SHA operation supported */ +enum sha_operation_mode { + SHA_GENERIC +}; + +/* SHA Supported Data Structures */ +struct sha_generic_data { + enum sha_type SHAType; + uint8_t *Data; + uint32_t DataLen; + uint32_t DataMemType; + uint8_t *Digest; + uint32_t DigestLen; + uint8_t *IntermediateDigest; + uint32_t IntermediateMsgLen; + uint32_t Init; + uint32_t Eom; +}; + +/* + * This is state that PSP manages internally. + * We only report BOOT_MODE_DEVELOPER or BOOT_MODE_NORMAL in verstage. + */ +enum chrome_platform_boot_mode +{ + NON_CHROME_BOOK_BOOT_MODE = 0x0, + CHROME_BOOK_BOOT_MODE_UNSIGNED_VERSTAGE = 0x1, + CHROME_BOOK_BOOT_MODE_NORMAL = 0x2, + CHROME_BOOK_BOOT_MODE_DEVELOPER = 0x3, + CHROME_BOOK_BOOT_MODE_TYPE_MAX_LIMIT = 0x4, // used for boundary check +}; + +struct psp_fw_entry_hash_256 { + uint16_t fw_type; + uint16_t sub_type; + uint8_t sha[32]; +} __packed; + +struct psp_fw_entry_hash_384 { + uint16_t fw_type; + uint16_t sub_type; + uint8_t sha[48]; +} __packed; + +struct psp_fw_hash_table { + uint16_t version; // Version of psp_fw_hash_table, Start with 0. + uint16_t no_of_entries_256; + uint16_t no_of_entries_384; + struct psp_fw_entry_hash_256 *fw_hash_256; + struct psp_fw_entry_hash_384 *fw_hash_384; +} __packed; + +/* + * Exit to the main Boot Loader. This does not return back to user application. + * + * Parameters: + * status - either Ok or error code defined by AGESA + */ +void svc_exit(uint32_t status); + +/* Print debug message into serial console. + * + * Parameters: + * string - null-terminated string + */ +void svc_debug_print(const char *string); + +/* Print 4 DWORD values in hex to serial console + * + * Parameters: + * dword0...dword3 - 32-bit DWORD to print + */ +void svc_debug_print_ex(uint32_t dword0, + uint32_t dword1, uint32_t dword2, uint32_t dword3); + +/* Description - Returns the current boot mode from the enum psp_boot_mode found in + * bl_public.h. + * + * Inputs - boot_mode - Output parameter passed in R0 + * + * Outputs - The boot mode in boot_mode. + * See Return Values. + * + * Return Values - BL_OK + * BL_ERR_NULL_PTR + * Other BL_ERRORs lofted up from called functions + */ +uint32_t svc_get_boot_mode(uint32_t *boot_mode); + +/* Add delay in micro seconds + * + * Parameters: + * delay - required delay value in microseconds + * + * Return value: NONE + */ +void svc_delay_in_usec(uint32_t delay); + +/* Get the SPI-ROM information + * + * Parameters: + * spi_rom_iInfo - SPI-ROM information + * + * Return value: BL_OK or error code + */ +uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info); + +/* Map the FCH IO device register space (SPI/I2C/GPIO/eSPI/etc...) + * + * Parameters: + * io_device - ID for respective FCH IO controller register space to be mapped + * arg1 - Based on IODevice ID, interpretation of this argument changes. + * arg2 - Based on IODevice ID, interpretation of this argument changes. + * io_device_axi_addr - AXI address for respective FCH IO device register space + * + * Return value: BL_OK or error code + */ +uint32_t svc_map_fch_dev(enum fch_io_device io_device, + uint32_t arg1, uint32_t arg2, void **io_device_axi_addr); + +/* Unmap the FCH IO device register space mapped earlier using Svc_MapFchIODevice() + * + * Parameters: + * io_device - ID for respective FCH IO controller register space to be unmapped + * io_device_addr - AXI address for respective FCH IO device register space + * + * Return value: BL_OK or error code + */ +uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, + void *io_device_axi_addr); + +/* Map the SPIROM FLASH device address space + * + * Parameters: + * SpiRomAddr - Address in SPIROM tobe mapped (SMN based) + * size - Size to be mapped + * pSpiRomAddrAxi - Mapped address in AXI space + * + * Return value: BL_OK or error code + */ +uint32_t svc_map_spi_rom(void *spi_rom_addr, + uint32_t size, void **spi_rom_axi_addr); + +/* Unmap the SPIROM FLASH device address space mapped earlier using Svc_MapSpiRomDevice() + * + * Parameters: + * pSpiRomAddrAxi - Address in AXI address space previously mapped + * + * Return value: BL_OK or error code + */ +uint32_t svc_unmap_spi_rom(void *spi_rom_addr); + +/* Updates the offset at which PSP or BIOS Directory can be found in the + * SPI flash + * + * Parameters: + * psp_dir_offset - [in/out] Offset at which PSP Directory can be + * found in the SPI Flash. Same pointer is used + * to return the offset in case of GET operation + * bios_dir_offset - [in/out] Offset at which BIOS Directory can be + * found in the SPI Flash. Same pointer is used + * to return the offset in case of GET operation + * + * Return value: BL_OK or error code + */ +uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, + uint32_t *bios_dir_offset); + +/* Copies the data that is shared by verstage to the PSP BL owned memory + * + * Parameters: + * address - Address in UAPP controlled/owned memory + * size - Total size of memory to copy (max 16Kbytes) + */ +uint32_t svc_save_uapp_data(void *address, uint32_t size); + +/* + * Read timer raw (currently CHRONO and RTC) value + * + * Parameters: + * type - [in] Type of timer UAPP would like to read from + * (currently CHRONO and RTC) + * counter_value - [out] return the raw counter value read from + * RTC or CHRONO_LO/HI counter register + -----------------------------------------------------------------------------*/ +uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value); + +/* + * Reset the system + * + * Parameters: + * reset_type - Cold or Warm reset + */ +uint32_t svc_reset_system(enum reset_type reset_type); + +/* + * Write postcode to Port-80 + * + * Parameters: + * postcode - Postcode value to be written on port-80h + */ +uint32_t svc_write_postcode(uint32_t postcode); + +/* + * Generic SHA call for SHA, SHA_OTP, SHA_HMAC + */ +uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode); + +/* + * Calculate ModEx + * + * Parameters: + * mod_exp_param - ModExp parameters + * + * Return value: BL_OK or error code + */ +uint32_t svc_modexp(struct mod_exp_params *mod_exp_param); + +/* + * Copies the data from source to destination using ccp + * + * Parameters: + * Source Address - SPI ROM offset + * Destination Address - Address in Verstage memory + * Size - Total size to copy + * + * Return value: BL_OK or error code + */ +uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size); + +/* + * Get the Platform boot mode from verstage. Normal or developer + * + * Parameters: + * - boot mode + -----------------------------------------------------------------------------*/ +uint32_t svc_set_platform_boot_mode(enum chrome_platform_boot_mode boot_mode); + +/* + * Set the PSP FW hash table. + * + * Parameters: + * - hash_table - Table of hash for each PSP binary signed against SoC chain of trust + * + * Return value: BL_OK or error code + */ +uint32_t svc_set_fw_hash_table(struct psp_fw_hash_table *hash_table); + +/* Get the previous boot status. + * + * Parameters: + * - boot_status - Address where the boot status is read into + * + * Return value: BL_OK or error code + */ +uint32_t svc_get_prev_boot_status(uint32_t *boot_status); + +/* Get HSP Secure state + * + * Parameters: + * - hsp_secure_state - Address where the state info is read into + * + * Return value: BL_OK or error code + */ +uint32_t svc_get_hsp_secure_state(uint32_t *hsp_secure_state); + +/* C entry point for the Bootloader Userspace Application */ +void Main(void); + +#endif /* _BL_SYSCALL__PUBLIC_H_ */ diff --git a/src/vendorcode/amd/psp_verstage/phoenix/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/psp_verstage/phoenix/include/bl_uapp/bl_syscall_public.h new file mode 100644 index 0000000000..b3e41404e8 --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/phoenix/include/bl_uapp/bl_syscall_public.h @@ -0,0 +1,428 @@ +/***************************************************************************** + * + * Copyright (c) 2022, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +/* TODO: Update for Phoenix */ + +#ifndef _BL_SYSCALL_PUBLIC_H_ +#define _BL_SYSCALL_PUBLIC_H_ + +#include + +#define SVC_EXIT 0x00 +#define SVC_ENTER 0x02 +#define SVC_VERSTAGE_CMD 0x3A + +enum verstage_cmd_id { + CMD_SHA = 1, + CMD_MODEXP, + CMD_DEBUG_PRINT, + CMD_DEBUG_PRINT_EX, + CMD_UPDATE_PSP_BIOS_DIR, + CMD_GET_SPI_INFO, + CMD_MAP_SPIROM_DEVICE, + CMD_UNMAP_SPIROM_DEVICE, + CMD_READ_TIMER_VAL, + CMD_DELAY_IN_MICRO_SECONDS, + CMD_RESET_SYSTEM, + CMD_GET_BOOT_MODE, + CMD_COPY_DATA_FROM_UAPP, + CMD_MAP_FCH_IO_DEVICE, + CMD_UNMAP_FCH_IO_DEVICE, + CMD_CCP_DMA, + CMD_SET_PLATFORM_BOOT_MODE, + CMD_SET_FW_HASH_TABLE, + CMD_GET_PREV_BOOT_STATUS, + CMD_GET_HSP_SECURE_STATE, + CMD_WRITE_POSTCODE, + CMD_SET_FW_HASH_TABLE_STAGE1, + CMD_SET_FW_HASH_TABLE_STAGE2, + CMD_SET_FW_HASH_TABLE_TOS, +}; + +struct mod_exp_params { + char *pExponent; // Exponent address + unsigned int ExpSize; // Exponent size in bytes + char *pModulus; // Modulus address + unsigned int ModulusSize; // Modulus size in bytes + char *pMessage; // Message address, same size as ModulusSize + char *pOutput; // Output address; Must be big enough to hold the + // data of ModulusSize +}; + +enum psp_boot_mode { + PSP_BOOT_MODE_S0 = 0x0, + PSP_BOOT_MODE_S0i3_RESUME = 0x1, + PSP_BOOT_MODE_S3_RESUME = 0x2, + PSP_BOOT_MODE_S4 = 0x3, + PSP_BOOT_MODE_S5_COLD = 0x4, + PSP_BOOT_MODE_S5_WARM = 0x5, +}; + +enum reset_type +{ + RESET_TYPE_COLD = 0, + RESET_TYPE_WARM = 1, + RESET_TYPE_MAX = 2, +}; + +enum fch_io_device { + FCH_IO_DEVICE_SPI, + FCH_IO_DEVICE_I2C, + FCH_IO_DEVICE_GPIO, + FCH_IO_DEVICE_ESPI, + FCH_IO_DEVICE_IOMUX, + FCH_IO_DEVICE_MISC, + FCH_IO_DEVICE_AOAC, + FCH_IO_DEVICE_IOPORT, + FCH_IO_DEVICE_UART, + FCH_IO_DEVICE_END, +}; + +enum fch_i2c_controller_id { + FCH_I2C_CONTROLLER_ID_0 = 0, + FCH_I2C_CONTROLLER_ID_1 = 1, + FCH_I2C_CONTROLLER_ID_2 = 2, + FCH_I2C_CONTROLLER_ID_3 = 3, + FCH_I2C_CONTROLLER_ID_MAX, +}; + +enum fch_uart_id { + FCH_UART_ID_0 = 0, + FCH_UART_ID_1 = 1, + FCH_UART_ID_MAX, +}; + +struct spirom_info { + void *SpiBiosSysHubBase; + void *SpiBiosSmnBase; + uint32_t SpiBiosSize; +}; + +enum psp_timer_type { + PSP_TIMER_TYPE_CHRONO = 0, + PSP_TIMER_TYPE_SECURE_RTC = 1, + PSP_TIMER_TYPE_MAX = 2, +}; + +/* SHA types same as ccp SHA type in crypto.h */ +enum sha_type { + SHA_TYPE_256, + SHA_TYPE_384 +}; + +/* All SHA operation supported */ +enum sha_operation_mode { + SHA_GENERIC +}; + +/* SHA Supported Data Structures */ +struct sha_generic_data { + enum sha_type SHAType; + uint8_t *Data; + uint32_t DataLen; + uint32_t DataMemType; + uint8_t *Digest; + uint32_t DigestLen; + uint8_t *IntermediateDigest; + uint32_t IntermediateMsgLen; + uint32_t Init; + uint32_t Eom; +}; + +/* + * This is state that PSP manages internally. + * We only report BOOT_MODE_DEVELOPER or BOOT_MODE_NORMAL in verstage. + */ +enum chrome_platform_boot_mode +{ + NON_CHROME_BOOK_BOOT_MODE = 0x0, + CHROME_BOOK_BOOT_MODE_UNSIGNED_VERSTAGE = 0x1, + CHROME_BOOK_BOOT_MODE_NORMAL = 0x2, + CHROME_BOOK_BOOT_MODE_DEVELOPER = 0x3, + CHROME_BOOK_BOOT_MODE_TYPE_MAX_LIMIT = 0x4, // used for boundary check +}; + +struct psp_fw_entry_hash_256 { + uint16_t fw_type; + uint16_t sub_type; + uint8_t sha[32]; +} __packed; + +struct psp_fw_entry_hash_384 { + uint16_t fw_type; + uint16_t sub_type; + uint8_t sha[48]; +} __packed; + +struct psp_fw_hash_table { + uint16_t version; // Version 1 of psp_fw_hash_table. + uint16_t no_of_entries_256; + uint16_t no_of_entries_384; + struct psp_fw_entry_hash_256 *fw_hash_256; + struct psp_fw_entry_hash_384 *fw_hash_384; +} __packed; + +struct psp_fw_entry_hash_256_v2 { + uint8_t uuid[16]; + uint8_t sha[32]; +} __packed; + +struct psp_fw_entry_hash_384_v2 { + uint8_t uuid[16]; + uint8_t sha[48]; +} __packed; + +struct psp_fw_hash_table_v2 { + uint16_t version; // Version 2 of psp_fw_hash_table. + uint16_t no_of_entries_256; + uint16_t no_of_entries_384; + uint16_t reserved; // For alignment purposes. + struct psp_fw_entry_hash_256_v2 *fw_hash_256; + struct psp_fw_entry_hash_384_v2 *fw_hash_384; +} __packed; + +/* + * Exit to the main Boot Loader. This does not return back to user application. + * + * Parameters: + * status - either Ok or error code defined by AGESA + */ +void svc_exit(uint32_t status); + +/* Print debug message into serial console. + * + * Parameters: + * string - null-terminated string + */ +void svc_debug_print(const char *string); + +/* Print 4 DWORD values in hex to serial console + * + * Parameters: + * dword0...dword3 - 32-bit DWORD to print + */ +void svc_debug_print_ex(uint32_t dword0, + uint32_t dword1, uint32_t dword2, uint32_t dword3); + +/* Description - Returns the current boot mode from the enum psp_boot_mode found in + * bl_public.h. + * + * Inputs - boot_mode - Output parameter passed in R0 + * + * Outputs - The boot mode in boot_mode. + * See Return Values. + * + * Return Values - BL_OK + * BL_ERR_NULL_PTR + * Other BL_ERRORs lofted up from called functions + */ +uint32_t svc_get_boot_mode(uint32_t *boot_mode); + +/* Add delay in micro seconds + * + * Parameters: + * delay - required delay value in microseconds + * + * Return value: NONE + */ +void svc_delay_in_usec(uint32_t delay); + +/* Get the SPI-ROM information + * + * Parameters: + * spi_rom_iInfo - SPI-ROM information + * + * Return value: BL_OK or error code + */ +uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info); + +/* Map the FCH IO device register space (SPI/I2C/GPIO/eSPI/etc...) + * + * Parameters: + * io_device - ID for respective FCH IO controller register space to be mapped + * arg1 - Based on IODevice ID, interpretation of this argument changes. + * arg2 - Based on IODevice ID, interpretation of this argument changes. + * io_device_axi_addr - AXI address for respective FCH IO device register space + * + * Return value: BL_OK or error code + */ +uint32_t svc_map_fch_dev(enum fch_io_device io_device, + uint32_t arg1, uint32_t arg2, void **io_device_axi_addr); + +/* Unmap the FCH IO device register space mapped earlier using Svc_MapFchIODevice() + * + * Parameters: + * io_device - ID for respective FCH IO controller register space to be unmapped + * io_device_addr - AXI address for respective FCH IO device register space + * + * Return value: BL_OK or error code + */ +uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, + void *io_device_axi_addr); + +/* Map the SPIROM FLASH device address space + * + * Parameters: + * SpiRomAddr - Address in SPIROM tobe mapped (SMN based) + * size - Size to be mapped + * pSpiRomAddrAxi - Mapped address in AXI space + * + * Return value: BL_OK or error code + */ +uint32_t svc_map_spi_rom(void *spi_rom_addr, + uint32_t size, void **spi_rom_axi_addr); + +/* Unmap the SPIROM FLASH device address space mapped earlier using Svc_MapSpiRomDevice() + * + * Parameters: + * pSpiRomAddrAxi - Address in AXI address space previously mapped + * + * Return value: BL_OK or error code + */ +uint32_t svc_unmap_spi_rom(void *spi_rom_addr); + +/* Updates the offset at which PSP or BIOS Directory can be found in the + * SPI flash + * + * Parameters: + * psp_dir_offset - [in/out] Offset at which PSP Directory can be + * found in the SPI Flash. Same pointer is used + * to return the offset in case of GET operation + * bios_dir_offset - [in/out] Offset at which BIOS Directory can be + * found in the SPI Flash. Same pointer is used + * to return the offset in case of GET operation + * + * Return value: BL_OK or error code + */ +uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, + uint32_t *bios_dir_offset); + +/* Copies the data that is shared by verstage to the PSP BL owned memory + * + * Parameters: + * address - Address in UAPP controlled/owned memory + * size - Total size of memory to copy (max 16Kbytes) + */ +uint32_t svc_save_uapp_data(void *address, uint32_t size); + +/* + * Read timer raw (currently CHRONO and RTC) value + * + * Parameters: + * type - [in] Type of timer UAPP would like to read from + * (currently CHRONO and RTC) + * counter_value - [out] return the raw counter value read from + * RTC or CHRONO_LO/HI counter register + -----------------------------------------------------------------------------*/ +uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value); + +/* + * Reset the system + * + * Parameters: + * reset_type - Cold or Warm reset + */ +uint32_t svc_reset_system(enum reset_type reset_type); + +/* + * Write postcode to Port-80 + * + * Parameters: + * postcode - Postcode value to be written on port-80h + */ +uint32_t svc_write_postcode(uint32_t postcode); + +/* + * Generic SHA call for SHA, SHA_OTP, SHA_HMAC + */ +uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode); + +/* + * Calculate ModEx + * + * Parameters: + * mod_exp_param - ModExp parameters + * + * Return value: BL_OK or error code + */ +uint32_t svc_modexp(struct mod_exp_params *mod_exp_param); + +/* + * Copies the data from source to destination using ccp + * + * Parameters: + * Source Address - SPI ROM offset + * Destination Address - Address in Verstage memory + * Size - Total size to copy + * + * Return value: BL_OK or error code + */ +uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size); + +/* + * Get the Platform boot mode from verstage. Normal or developer + * + * Parameters: + * - boot mode + -----------------------------------------------------------------------------*/ +uint32_t svc_set_platform_boot_mode(enum chrome_platform_boot_mode boot_mode); + +/* + * Set PSP FW hash table. + * + * Parameters: + * - hash_table - Table of hash for each PSP binary signed against SoC chain of trust + * - cmd - Cmd to indicate the PSP stage using the hash table + * + * Return value: BL_OK or error code + */ +uint32_t svc_set_fw_hash_table(enum verstage_cmd_id cmd, void *hash_table); + +/* Get the previous boot status. + * + * Parameters: + * - boot_status - Address where the boot status is read into + * + * Return value: BL_OK or error code + */ +uint32_t svc_get_prev_boot_status(uint32_t *boot_status); + +/* Get HSP Secure state + * + * Parameters: + * - hsp_secure_state - Address where the state info is read into + * + * Return value: BL_OK or error code + */ +uint32_t svc_get_hsp_secure_state(uint32_t *hsp_secure_state); + +/* C entry point for the Bootloader Userspace Application */ +void Main(void); + +#endif /* _BL_SYSCALL__PUBLIC_H_ */ diff --git a/src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_end.S new file mode 100644 index 0000000000..db6556cb0a --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_end.S @@ -0,0 +1,44 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +.arm +.global LastBytes +.section PSP_FOOTER_DATA, "a", %note +.balign 64 + +// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte +// in size so that the binary size is multiple of 64 bytes. +// +LastBytes: + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + .byte 0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99,0x99 + +.end diff --git a/src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_header.inc b/src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_header.inc new file mode 100644 index 0000000000..e2a16667a4 --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_header.inc @@ -0,0 +1,64 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +.global LastBytes + +#define BL_UAPP_START_ADDRESS 0x00015000 +#define SIZE_OF_THIS_HEADER 256 +#define SIZE_OF_PSP_END 64 +#define IMAGE_SIZE LastBytes + SIZE_OF_PSP_END - BL_UAPP_START_ADDRESS - SIZE_OF_THIS_HEADER + +#define IMAGE_VERSION 0x01,0x00,0x00,0x00 +#define FW_TYPE 0x52 + + + // 256 byte binary header + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 // nonce + .byte 0x00,0x00,0x00,0x00 // header version + .word IMAGE_SIZE + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte IMAGE_VERSION + .byte 0x00,0x00,0x00,0x00 // APU Family ID + .byte 0x00,0x01,0x00,0x00 // Load Address + .byte 0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte FW_TYPE + .byte 0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 diff --git a/src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_startup.S b/src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_startup.S new file mode 100644 index 0000000000..15340d58ae --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_startup.S @@ -0,0 +1,105 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +#include +#include + + .global Main + .global _psp_vs_start + + .global PSP_VERSTAGE_STACK_BASE + .global PSP_VERSTAGE_STACK_END + .global PSP_VERSTAGE_TEMP_STACK_END + +.arm +.text +.section "PSP_HEADER_DATA", "aw", %note + +//============================================================================== +// First 256 bytes of the binary image contain the header. +// Executable code starts from offset 0x100. +//============================================================================== +#include "bl_uapp_header.inc" + +//============================================================================== +// This is entry point to the binary which is called by main Boot Loader. +//============================================================================== + +ENTRY(_psp_vs_start) + // Map Debug Unlock stack to separate Virtual Address so that stack + // overflow cause exception instead of data corruption. + // + + ldr sp, =PSP_VERSTAGE_TEMP_STACK_END // temporary stack pointer + ldr r2, =AllocateStack + blx r2 + + // Return value contains Virtual Address of mapped stack + // + mov sp, r0 // set OEM PSP BL user app stack pointer + ldr lr, =ShouldNotBeReached // return address + + ldr r2, =Main // pass control to verstage main function + blx r2 + +// This point should not be reached. The Main() function should return +// to main BL using Svc_Exit(). +// +ShouldNotBeReached: + mov r0, #BL_ERR_GENERIC // Returned from Main + svc #0x0 // SVC_EXIT + +ENDPROC(_psp_vs_start) + +//============================================================================== +// Code to allocate an address space for stack +//============================================================================== +.global AllocateStack + +ENTRY(AllocateStack) + push {r3,lr} + ldr r0, =PSP_VERSTAGE_STACK_BASE + mov r2, sp + ldr r1, =PSP_VERSTAGE_STACK_END + svc #0x1 // 0x1 is the SvcID for SVC_MAP_USER_STACK + cmp r0, #0 + bne svcExit + ldr r0,[sp,#0] + cmp r0, #0 // r0 contains the virtual stack address + bne ret + +svcExit: + mov r0, #BL_ERR_GENERIC + svc #0x0 // SVC_EXIT + +ret: + pop {r3,pc} + +ENDPROC(AllocateStack) +.end diff --git a/src/vendorcode/amd/psp_verstage/picasso/include/bl_uapp/bl_errorcodes_public.h b/src/vendorcode/amd/psp_verstage/picasso/include/bl_uapp/bl_errorcodes_public.h new file mode 100644 index 0000000000..1d5e86ffb1 --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/picasso/include/bl_uapp/bl_errorcodes_public.h @@ -0,0 +1,80 @@ +/***************************************************************************** + * + * Copyright (c) 2020, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *******************************************************************************/ + +#ifndef BL_ERRORCODES_PUBLIC_H +#define BL_ERRORCODES_PUBLIC_H + +/* Bootloader Return Codes, Error only (0x00 through 0x9F) */ +#define BL_OK 0x00 // General - Success +#define BL_ERR_GENERIC 0x01 // Generic Error Code +#define BL_ERR_MEMORY 0x02 // Generic Memory Error +#define BL_ERR_BUFFER_OVERFLOW 0x03 // Buffer Overflow +#define BL_ERR_INVALID_PARAMETER 0x04 // Invalid Parameter(s) +#define BL_ERR_DATA_ALIGNMENT 0x06 // Data Alignment Error +#define BL_ERR_NULL_PTR 0x07 // Null Pointer Error +#define BL_ERR_INVALID_ADDRESS 0x0A // Invalid Address +#define BL_ERR_OUT_OF_RESOURCES 0x0B // Out of Resource Error +#define BL_ERR_DATA_ABORT 0x0D // Data Abort exception +#define BL_ERR_PREFETCH_ABORT 0x0E // Prefetch Abort exception +#define BL_ERR_GET_FW_HEADER 0x13 // Failure in retrieving firmware + // header +#define BL_ERR_KEY_SIZE 0x14 // Key size not supported +#define BL_ERR_ENTRY_NOT_FOUND 0x15 // Entry not found at requested + // location +#define BL_ERR_UNSUPPORTED_PLATFORM 0x16 // Error when feature is not enabled + // on a given platform. +#define BL_ERR_FWVALIDATION 0x18 // Generic FW Validation error +#define BL_ERR_CCP_RSA 0x19 // RSA operation fail - bootloader +#define BL_ERR_CCP_PASSTHR 0x1A // CCP Passthrough operation failed +#define BL_ERR_CCP_AES 0x1B // AES operation failed +#define BL_ERR_SHA 0x1E // SHA256/SHA384 operation failed +#define BL_ERR_ZLIB 0x1F // ZLib Decompression operation fail +#define BL_ERR_DIR_ENTRY_NOT_FOUND 0x22 // PSP directory entry not found +#define BL_ERR_SYSHUBMAP_FAILED 0x3A // Unable to map a SYSHUB address to + // AXI space +#define BL_ERR_UAPP_PSP_HEADER_NOT_MATCH 0x7A // PSP level directory from OEM user- + // app does not match expected value. +#define BL_ERR_UAPP_BIOS_HEADER_NOT_MATCH 0x7B // BIOS level directory from OEM + // user-app not match expected value. +#define BL_ERR_UAPP_PSP_DIR_OFFSET_NOT_SET 0x7C // PSP Directory offset is not set + // by OEM user-app. +#define BL_ERR_UAPP_BIOS_DIR_OFFSET_NOT_SET 0x7D // BIOS Directory offset is not set + // by OEM user-app. +#define BL_ERR_POSTCODE_MAX_VALUE 0x9F // The maximum allowable error post + +/* Bootloader Return Codes, Success only (0xA0 through 0xFF) */ +#define BL_SUCCESS_USERMODE_OEM_APP 0xF7 // Updated only PSPFW Status when OEM + // PSP BL user app returns success. +#define BL_SUCCESS_PSP_BIOS_DIRECTORY_UPDATE 0xF8 // PSP and BIOS directories are loaded + // into SRAM from the offset provided + // by OEM user app. + +#define BL_SUCCESS_LAST_CODE 0xFF // Bootloader sequence finished + +#endif /* BL_ERRORCODES_PUBLIC_H */ diff --git a/src/vendorcode/amd/psp_verstage/picasso/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/psp_verstage/picasso/include/bl_uapp/bl_syscall_public.h new file mode 100644 index 0000000000..0c168a93b2 --- /dev/null +++ b/src/vendorcode/amd/psp_verstage/picasso/include/bl_uapp/bl_syscall_public.h @@ -0,0 +1,416 @@ +/***************************************************************************** + * + * Copyright (c) 2019, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ***************************************************************************/ + +#ifndef _BL_SYSCALL_PUBLIC_H_ +#define _BL_SYSCALL_PUBLIC_H_ + +#include +#include + +#define SVC_EXIT 0x00 +#define SVC_MAP_USER_STACK 0x01 +#define SVC_DEBUG_PRINT 0x06 +#define SVC_MODEXP 0x0C +#define SVC_RSAPSS_VERIFY 0x0D +#define SVC_DEBUG_PRINT_EX 0x1A +#define SVC_WAIT_10NS_MULTIPLE 0x1B +#define SVC_GET_BOOT_MODE 0x1C +#define SVC_DELAY_IN_MICRO_SECONDS 0x2F +#define SVC_GET_SPI_INFO 0x35 +#define SVC_MAP_FCH_IO_DEVICE 0x36 +#define SVC_UNMAP_FCH_IO_DEVICE 0x37 +#define SVC_MAP_SPIROM_DEVICE 0x38 +#define SVC_UNMAP_SPIROM_DEVICE 0x39 +#define SVC_UPDATE_PSP_BIOS_DIR 0x40 +#define SVC_COPY_DATA_FROM_UAPP 0x41 +#define SVC_READ_TIMER_VAL 0x42 +#define SVC_RESET_SYSTEM 0x43 +#define SVC_WRITE_POSTCODE 0x44 +#define SVC_GET_MAX_WORKBUF_SIZE 0x45 +#define SVC_SHA 0x46 +#define SVC_RSAPKCS_VERIFY 0x47 + +/* Bit definitions for the psp_info field in the PSP transfer_info_struct */ +#define PSP_INFO_PRODUCTION_MODE 0x00000001UL +#define PSP_INFO_PRODUCTION_SILICON 0x00000002UL +#define PSP_INFO_VALID 0x80000000UL + +struct mod_exp_params { + char *pExponent; // Exponent address + unsigned int ExpSize; // Exponent size in bytes + char *pModulus; // Modulus address + unsigned int ModulusSize; // Modulus size in bytes + char *pMessage; // Message address, same size as ModulusSize + char *pOutput; // Output address; Must be big enough to hold the + // data of ModulusSize +}; + +struct rsapss_verify_params { + char *pHash; // Message digest to verify the RSA signature + unsigned int HashLen; // hash length in bytes + char *pModulus; // Modulus address + unsigned int ModulusSize; // Modulus length in bytes + char *pExponent; // Exponent address + unsigned int ExpSize; // Exponent length in bytes + char *pSig; // Signature to be verified, same size as ModulusSize +}; + +struct rsapkcs_verify_params { + char *pHash; // Message digest to verify the RSA signature + unsigned int HashLen; // hash length in bytes + char *pModulus; // Modulus address + unsigned int ModulusSize; // Modulus length in bytes + char *pExponent; // Exponent address + unsigned int ExpSize; // Exponent length in bytes + char *pSig; // Signature to be verified, same size as ModulusSize +}; + +enum psp_boot_mode { + PSP_BOOT_MODE_S0 = 0x0, + PSP_BOOT_MODE_S0i3_RESUME = 0x1, + PSP_BOOT_MODE_S3_RESUME = 0x2, + PSP_BOOT_MODE_S4 = 0x3, + PSP_BOOT_MODE_S5_COLD = 0x4, + PSP_BOOT_MODE_S5_WARM = 0x5, +}; + +enum fch_io_device { + FCH_IO_DEVICE_SPI, + FCH_IO_DEVICE_I2C, + FCH_IO_DEVICE_GPIO, + FCH_IO_DEVICE_ESPI, + FCH_IO_DEVICE_IOMUX, + FCH_IO_DEVICE_MISC, + FCH_IO_DEVICE_AOAC, + FCH_IO_DEVICE_IOPORT, + + FCH_IO_DEVICE_END, +}; + +/* Svc_UpdatePspBiosDir can be used to GET or SET the PSP or BIOS directory + * offsets. This enum is used to specify whether it is a GET or SET operation. + */ +enum dir_offset_operation { + DIR_OFFSET_GET = 0x0, + DIR_OFFSET_SET, + DIR_OFFSET_OPERATION_MAX +}; + +enum fch_i2c_controller_id { + FCH_I2C_CONTROLLER_ID_2 = 2, + FCH_I2C_CONTROLLER_ID_3 = 3, + FCH_I2C_CONTROLLER_ID_4 = 4, + FCH_I2C_CONTROLLER_ID_MAX, +}; + +enum uapp_copybuf { + UAPP_COPYBUF_CHROME_WORKBUF = 0x0, + UAPP_COPYBUF_MAX = 0x1, +}; + +struct spirom_info { + void *SpiBiosSysHubBase; + void *SpiBiosSmnBase; + uint32_t SpiBiosSize; +}; + +enum psp_timer_type { + PSP_TIMER_TYPE_CHRONO = 0, + PSP_TIMER_TYPE_RTC = 1, + PSP_TIMER_TYPE_MAX = 2, +}; + +enum reset_type { + RESET_TYPE_COLD = 0, + RESET_TYPE_WARM = 1, + RESET_TYPE_MAX = 2, +}; + +/* SHA types same as ccp SHA type in crypto.h */ +enum sha_type { + SHA_TYPE_256, + SHA_TYPE_512 +}; + +/* All SHA operation supported */ +enum sha_operation_mode { + SHA_GENERIC +}; + +/* SHA Supported Data Structures */ +struct sha_generic_data { + enum sha_type SHAType; + uint8_t *Data; + uint32_t DataLen; + uint32_t DataMemType; + uint8_t *Digest; + uint32_t DigestLen; + uint8_t *IntermediateDigest; + uint32_t IntermediateMsgLen; + uint32_t Init; + uint32_t Eom; +}; + +/* + * Exit to the main Boot Loader. This does not return back to user application. + * + * Parameters: + * status - either Ok or error code defined by AGESA + */ +void svc_exit(uint32_t status); + +/* Maps buffer for stack usage. + * + * Parameters: + * start_addr - start address of the stack buffer + * end_addr - end of the stack buffer + * stack_va - [out] mapped stack Virtual Address + * + * Return value: BL_OK or error code + */ +uint32_t svc_map_user_stack(void *start_addr, + void *end_addr, void *stack_va); + +/* Print debug message into serial console. + * + * Parameters: + * string - null-terminated string + */ +void svc_debug_print(const char *string); + +/* Print 4 DWORD values in hex to serial console + * + * Parameters: + * dword0...dword3 - 32-bit DWORD to print + */ +void svc_debug_print_ex(uint32_t dword0, + uint32_t dword1, uint32_t dword2, uint32_t dword3); + +/* Waits in a blocking call for multiples of 10ns (100MHz timer) before returning + * + * Parameters: + * multiple - The number of multiples of 10ns to wait + * + * Return value: BL_OK, or BL_ERR_TIMER_PARAM_OVERFLOW + */ +uint32_t svc_wait_10ns_multiple(uint32_t multiple); + +/* Description - Returns the current boot mode from the enum psp_boot_mode found in + * bl_public.h. + * + * Inputs - boot_mode - Output parameter passed in R0 + * + * Outputs - The boot mode in boot_mode. + * See Return Values. + * + * Return Values - BL_OK + * BL_ERR_NULL_PTR + * Other BL_ERRORs lofted up from called functions + */ +uint32_t svc_get_boot_mode(uint32_t *boot_mode); + +/* Add delay in micro seconds + * + * Parameters: + * delay - required delay value in microseconds + * + * Return value: NONE + */ +void svc_delay_in_usec(uint32_t delay); + +/* Get the SPI-ROM information + * + * Parameters: + * spi_rom_iInfo - SPI-ROM information + * + * Return value: BL_OK or error code + */ +uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info); + +/* Map the FCH IO device register space (SPI/I2C/GPIO/eSPI/etc...) + * + * Parameters: + * io_device - ID for respective FCH IO controller register space to be mapped + * arg1 - Based on IODevice ID, interpretation of this argument changes. + * arg2 - Based on IODevice ID, interpretation of this argument changes. + * io_device_axi_addr - AXI address for respective FCH IO device register space + * + * Return value: BL_OK or error code + */ +uint32_t svc_map_fch_dev(enum fch_io_device io_device, + uint32_t arg1, uint32_t arg2, void **io_device_axi_addr); + +/* Unmap the FCH IO device register space mapped earlier using Svc_MapFchIODevice() + * + * Parameters: + * io_device - ID for respective FCH IO controller register space to be unmapped + * io_device_addr - AXI address for respective FCH IO device register space + * + * Return value: BL_OK or error code + */ +uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, + void *io_device_axi_addr); + +/* Map the SPIROM FLASH device address space + * + * Parameters: + * SpiRomAddr - Address in SPIROM tobe mapped (SMN based) + * size - Size to be mapped + * pSpiRomAddrAxi - Mapped address in AXI space + * + * Return value: BL_OK or error code + */ +uint32_t svc_map_spi_rom(void *spi_rom_addr, + uint32_t size, void **spi_rom_axi_addr); + +/* Unmap the SPIROM FLASH device address space mapped earlier using Svc_MapSpiRomDevice() + * + * Parameters: + * pSpiRomAddrAxi - Address in AXI address space previously mapped + * + * Return value: BL_OK or error code + */ +uint32_t svc_unmap_spi_rom(void *spi_rom_addr); + +/* Updates the offset at which PSP or BIOS Directory can be found in the + * SPI flash + * + * Parameters: + * psp_dir_offset - [in/out] Offset at which PSP Directory can be + * found in the SPI Flash. Same pointer is used + * to return the offset in case of GET operation + * bios_dir_offset - [in/out] Offset at which BIOS Directory can be + * found in the SPI Flash. Same pointer is used + * to return the offset in case of GET operation + * operation - [in] Specifies whether this call is used for + * getting or setting the offset. + * + * Return value: BL_OK or error code + */ +uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, + uint32_t *bios_dir_offset, enum dir_offset_operation operation); + +/* Copies the data that is shared by verstage to the PSP BL owned memory + * + * Parameters: + * type - enum + * address - Address in UAPP controlled/owned memory + * size - Total size of memory to copy (max 16Kbytes) + */ +uint32_t svc_save_uapp_data(enum uapp_copybuf type, void *address, + uint32_t size); + +/* + * Read timer raw (currently CHRONO and RTC) value + * + * Parameters: + * Type - Type of timer UAPP would like to read from + * (currently CHRONO and RTC) + * counter_value - [out] return the raw counter value read from + * RTC or CHRONO_LO/HI counter register + */ +uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value ); + +/* + * Reset the system + * + * Parameters: + * reset_type - Cold or Warm reset + */ +uint32_t svc_reset_system(enum reset_type reset_type); + +/* + * Write postcode to Port-80 + * + * Parameters: + * postcode - Postcode value to be written on port-80h + */ +uint32_t svc_write_postcode(uint32_t postcode); + +/* + * Get the max size of workbuf memory supported by PSP BL + * + * Parameters: + * size - [out] Max size supported by PSP BL for workbuf copy + */ +uint32_t svc_get_max_workbuf_size(uint32_t *size); + +/* + * Generic SHA call for SHA, SHA_OTP, SHA_HMAC + */ +uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode); + +/* + * RSA PSS Verification of signature and data + * + * Parameters: + * rsapss_verify_params - Pointer to RSA PSS parameters + * + * Return value: BL_OK or error code + */ +uint32_t svc_rsa_pss_verify(const struct rsapss_verify_params *params); + +/* + * RSA PKCS Verification of signature and data + * + * Parameters: + * struct rsapkcs_verify_params - Pointer to RSA PKCS parameters + * + * Return value: BL_OK or error code + */ +uint32_t svc_rsa_pkcs_verify(const struct rsapkcs_verify_params *params); + +/* Calculate ModEx + * + * Parameters: + * mod_exp_param - ModExp parameters + * + * Return value: BL_OK or error code + */ +uint32_t svc_modexp(struct mod_exp_params *mod_exp_param); + +/* + * Copies the data from source to destination using ccp + * + * Parameters: + * Source Address - SPI ROM offset + * Destination Address - Address in Verstage memory + * Size - Total size to copy + * + * Return value: BL_OK or error code + */ +static inline uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size) +{ + return BL_ERR_UNSUPPORTED_PLATFORM; +} + +/* C entry point for the Bootloader Userspace Application */ +void Main(void); + +#endif /* _BL_SYSCALL__PUBLIC_H_ */ -- cgit v1.2.3