From 8e6d5f2937c169914e46b5ebc973e5df5e4290a7 Mon Sep 17 00:00:00 2001
From: Subrata Banik <subrata.banik@intel.com>
Date: Sun, 30 Aug 2020 13:51:44 +0530
Subject: {include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent

Convert 0X -> 0x

Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: Iea3ca67908135d0e85083a05bad2ea176ca34095
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44926
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/vendorcode/amd/pi/00660F01/Proc/CPU/cpuRegisters.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/vendorcode/amd/pi/00660F01/Proc/CPU/cpuRegisters.h')

diff --git a/src/vendorcode/amd/pi/00660F01/Proc/CPU/cpuRegisters.h b/src/vendorcode/amd/pi/00660F01/Proc/CPU/cpuRegisters.h
index 889be764a1..c16371f0a8 100644
--- a/src/vendorcode/amd/pi/00660F01/Proc/CPU/cpuRegisters.h
+++ b/src/vendorcode/amd/pi/00660F01/Proc/CPU/cpuRegisters.h
@@ -332,7 +332,7 @@ typedef struct {
 
 #define MSR_CPUID_NAME_STRING0      0xC0010030ul    // First CPUID namestring register
 #define MSR_CPUID_NAME_STRING1      0xC0010031ul
-#define MSR_CPUID_NAME_STRING2      0XC0010032ul
+#define MSR_CPUID_NAME_STRING2      0xC0010032ul
 #define MSR_CPUID_NAME_STRING3      0xC0010033ul
 #define MSR_CPUID_NAME_STRING4      0xC0010034ul
 #define MSR_CPUID_NAME_STRING5      0xC0010035ul    // Last CPUID namestring register
-- 
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