From 4f1786dcacbcb09bd09638616e8aa1b60125d626 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Thu, 18 Jan 2024 10:41:47 -0700 Subject: vendorcode: Rename Makefiles from .inc to .mk MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .inc suffix is confusing to various tools as it's not specific to Makefiles. This means that editors don't recognize the files, and don't open them with highlighting and any other specific editor functionality. This issue is also seen in the release notes generation script where Makefiles get renamed before running cloc. Signed-off-by: Martin Roth Change-Id: I80559b7c86a8fd2583cb0335279f676e0aa0209e Reviewed-on: https://review.coreboot.org/c/coreboot/+/80067 Reviewed-by: Maximilian Brune Tested-by: build bot (Jenkins) Reviewed-by: Felix Singer Reviewed-by: Michael Niewöhner Reviewed-by: Erik van den Bogaert --- src/vendorcode/amd/opensil/Makefile.inc | 93 ---------------------- src/vendorcode/amd/opensil/Makefile.mk | 93 ++++++++++++++++++++++ src/vendorcode/amd/opensil/genoa_poc/Makefile.inc | 19 ----- src/vendorcode/amd/opensil/genoa_poc/Makefile.mk | 19 +++++ .../amd/opensil/genoa_poc/mpio/Makefile.inc | 5 -- .../amd/opensil/genoa_poc/mpio/Makefile.mk | 5 ++ 6 files changed, 117 insertions(+), 117 deletions(-) delete mode 100644 src/vendorcode/amd/opensil/Makefile.inc create mode 100644 src/vendorcode/amd/opensil/Makefile.mk delete mode 100644 src/vendorcode/amd/opensil/genoa_poc/Makefile.inc create mode 100644 src/vendorcode/amd/opensil/genoa_poc/Makefile.mk delete mode 100644 src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.inc create mode 100644 src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.mk (limited to 'src/vendorcode/amd/opensil') diff --git a/src/vendorcode/amd/opensil/Makefile.inc b/src/vendorcode/amd/opensil/Makefile.inc deleted file mode 100644 index a97bf63e7c..0000000000 --- a/src/vendorcode/amd/opensil/Makefile.inc +++ /dev/null @@ -1,93 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_AMD_OPENSIL),y) - -ifneq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y) - $(error OpenSIL can only be built for either x86 or x86_64) -endif - -opensil_dir := $(call strip_quotes,$(CONFIG_AMD_OPENSIL_PATH)) - -subdirs-$(CONFIG_SOC_AMD_OPENSIL_GENOA_POC) += genoa_poc - -ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) -cpu_family_string="x86" -cpu_string="i686" -opensil_target_name=AMDopensil32 -is_32bit="true" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) -clang_args=\'-m32\'\, \'-fno-pic\'\, -endif -endif - -ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_64),y) -cpu_family_string="x86_64" -cpu_string="x86_64" -opensil_target_name=AMDopensil64 -is_32bit="false" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) -clang_args=\'-fno-pic\'\, -endif -endif - -ifeq ($(CONFIG_OPENSIL_DEBUG_OUTPUT),y) -sil_debug_enable="true" -else -sil_debug_enable="false" -endif - -# check if $(obj) is an absolute or a relative path -ifeq ($(shell printf %.1s "$(obj)"),/) -OBJPATH = $(obj) -else -OBJPATH = $(top)/$(obj) -endif - -PYTHON?=python - -OPENSIL_CONFIG=opensil_config - -bios_base=$(shell printf "%x" $(call int-subtract, $(CONFIG_ROMSTAGE_ADDR) $(CONFIG_C_ENV_BOOTBLOCK_SIZE))) -bios_size=$(CONFIG_C_ENV_BOOTBLOCK_SIZE) - -$(OBJPATH)/$(OPENSIL_CONFIG): $(opensil_dir)/../opensil_config.template - sed -e "s,##APOB_BASE##,$(CONFIG_PSP_APOB_DRAM_ADDRESS)," \ - -e "s,##BIOS_ENTRY_BASE##,$(bios_base)," \ - -e "s,##BIOS_ENTRY_SIZE##,$(bios_size) ," \ - $< > $@ - -$(OBJPATH)/$(OPENSIL_CONFIG).h: $(OBJPATH)/$(OPENSIL_CONFIG) $(obj)/config.h $(objutil)/kconfig/conf - cd $(opensil_dir); KCONFIG_CONFIG=$(OBJPATH)/$(OPENSIL_CONFIG) KCONFIG_AUTOHEADER=$@ $(PYTHON) util/kconfig/lib/genconfig.py Kconfig - -# meson handles ccache on its own -OPENSIL_COMPILER=$(filter-out $(CCACHE), $(CC_ramstage)) - -$(OBJPATH)/meson_crosscompile: $(opensil_dir)/../meson_cross.template $(obj)/config.h $(OBJPATH)/$(OPENSIL_CONFIG).h - sed -e "s,##COMPILER##,$(OPENSIL_COMPILER)," \ - -e "s,##AR##,$(AR_ramstage)," \ - -e "s,##NASM##,$(NASM)," \ - -e "s,##COREBOOT_DIR##,$(top)," \ - -e "s,##OPENSIL_DIR##,$(opensil_dir)," \ - -e "s,##OBJPATH##,$(OBJPATH)," \ - -e "s,##CPU_FAMILY##,$(cpu_family_string)," \ - -e "s,##CPU##,$(cpu_string)," \ - -e "s,##IS32BIT##,$(is_32bit)," \ - -e "s,##SIL_DEBUG_ENABLE##,$(sil_debug_enable)," \ - -e "s,##CLANG_ARGS##,$(clang_args)," \ - $< > $@ - -# Don't set a meson buildtype as opensil is broken when compiler optimizations are enabled -$(OBJPATH)/opensil: $(OBJPATH)/meson_crosscompile $(obj)/config.h - cd $(opensil_dir); meson setup --cross-file $< $(OBJPATH)/opensil -Db_staticpic=false \ - -DPlatKcfgDir=$(OBJPATH) -DPlatKcfg=$(OPENSIL_CONFIG) - -$(OBJPATH)/opensil/lib$(opensil_target_name).a: $(OBJPATH)/opensil - meson compile -C $(OBJPATH)/opensil $(opensil_target_name) - -$(OBJPATH)/opensil.a: $(OBJPATH)/opensil/lib$(opensil_target_name).a - cp $(OBJPATH)/opensil/lib$(opensil_target_name).a $@ - -romstage-libs += $(OBJPATH)/opensil.a -ramstage-libs += $(OBJPATH)/opensil.a - -endif diff --git a/src/vendorcode/amd/opensil/Makefile.mk b/src/vendorcode/amd/opensil/Makefile.mk new file mode 100644 index 0000000000..a97bf63e7c --- /dev/null +++ b/src/vendorcode/amd/opensil/Makefile.mk @@ -0,0 +1,93 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_AMD_OPENSIL),y) + +ifneq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y) + $(error OpenSIL can only be built for either x86 or x86_64) +endif + +opensil_dir := $(call strip_quotes,$(CONFIG_AMD_OPENSIL_PATH)) + +subdirs-$(CONFIG_SOC_AMD_OPENSIL_GENOA_POC) += genoa_poc + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) +cpu_family_string="x86" +cpu_string="i686" +opensil_target_name=AMDopensil32 +is_32bit="true" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) +clang_args=\'-m32\'\, \'-fno-pic\'\, +endif +endif + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_64),y) +cpu_family_string="x86_64" +cpu_string="x86_64" +opensil_target_name=AMDopensil64 +is_32bit="false" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) +clang_args=\'-fno-pic\'\, +endif +endif + +ifeq ($(CONFIG_OPENSIL_DEBUG_OUTPUT),y) +sil_debug_enable="true" +else +sil_debug_enable="false" +endif + +# check if $(obj) is an absolute or a relative path +ifeq ($(shell printf %.1s "$(obj)"),/) +OBJPATH = $(obj) +else +OBJPATH = $(top)/$(obj) +endif + +PYTHON?=python + +OPENSIL_CONFIG=opensil_config + +bios_base=$(shell printf "%x" $(call int-subtract, $(CONFIG_ROMSTAGE_ADDR) $(CONFIG_C_ENV_BOOTBLOCK_SIZE))) +bios_size=$(CONFIG_C_ENV_BOOTBLOCK_SIZE) + +$(OBJPATH)/$(OPENSIL_CONFIG): $(opensil_dir)/../opensil_config.template + sed -e "s,##APOB_BASE##,$(CONFIG_PSP_APOB_DRAM_ADDRESS)," \ + -e "s,##BIOS_ENTRY_BASE##,$(bios_base)," \ + -e "s,##BIOS_ENTRY_SIZE##,$(bios_size) ," \ + $< > $@ + +$(OBJPATH)/$(OPENSIL_CONFIG).h: $(OBJPATH)/$(OPENSIL_CONFIG) $(obj)/config.h $(objutil)/kconfig/conf + cd $(opensil_dir); KCONFIG_CONFIG=$(OBJPATH)/$(OPENSIL_CONFIG) KCONFIG_AUTOHEADER=$@ $(PYTHON) util/kconfig/lib/genconfig.py Kconfig + +# meson handles ccache on its own +OPENSIL_COMPILER=$(filter-out $(CCACHE), $(CC_ramstage)) + +$(OBJPATH)/meson_crosscompile: $(opensil_dir)/../meson_cross.template $(obj)/config.h $(OBJPATH)/$(OPENSIL_CONFIG).h + sed -e "s,##COMPILER##,$(OPENSIL_COMPILER)," \ + -e "s,##AR##,$(AR_ramstage)," \ + -e "s,##NASM##,$(NASM)," \ + -e "s,##COREBOOT_DIR##,$(top)," \ + -e "s,##OPENSIL_DIR##,$(opensil_dir)," \ + -e "s,##OBJPATH##,$(OBJPATH)," \ + -e "s,##CPU_FAMILY##,$(cpu_family_string)," \ + -e "s,##CPU##,$(cpu_string)," \ + -e "s,##IS32BIT##,$(is_32bit)," \ + -e "s,##SIL_DEBUG_ENABLE##,$(sil_debug_enable)," \ + -e "s,##CLANG_ARGS##,$(clang_args)," \ + $< > $@ + +# Don't set a meson buildtype as opensil is broken when compiler optimizations are enabled +$(OBJPATH)/opensil: $(OBJPATH)/meson_crosscompile $(obj)/config.h + cd $(opensil_dir); meson setup --cross-file $< $(OBJPATH)/opensil -Db_staticpic=false \ + -DPlatKcfgDir=$(OBJPATH) -DPlatKcfg=$(OPENSIL_CONFIG) + +$(OBJPATH)/opensil/lib$(opensil_target_name).a: $(OBJPATH)/opensil + meson compile -C $(OBJPATH)/opensil $(opensil_target_name) + +$(OBJPATH)/opensil.a: $(OBJPATH)/opensil/lib$(opensil_target_name).a + cp $(OBJPATH)/opensil/lib$(opensil_target_name).a $@ + +romstage-libs += $(OBJPATH)/opensil.a +ramstage-libs += $(OBJPATH)/opensil.a + +endif diff --git a/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc b/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc deleted file mode 100644 index 70bf44b32d..0000000000 --- a/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc +++ /dev/null @@ -1,19 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -subdirs-y += mpio - -CPPFLAGS_ramstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xUSL/FCH -I$(opensil_dir)/xUSL/FCH/Common -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF -CPPFLAGS_romstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF - -romstage-y += opensil_console.c -romstage-y += romstage.c - -ramstage-y += acpi.c -ramstage-y += memmap.c -ramstage-y += opensil_console.c -ramstage-y += ramstage.c - -$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/opensil_console.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas -$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/romstage.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas - -$(obj)/ramstage/vendorcode/amd/opensil/genoa_poc/opensil_console.o: CFLAGS_ramstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas diff --git a/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk b/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk new file mode 100644 index 0000000000..70bf44b32d --- /dev/null +++ b/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk @@ -0,0 +1,19 @@ +## SPDX-License-Identifier: GPL-2.0-only + +subdirs-y += mpio + +CPPFLAGS_ramstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xUSL/FCH -I$(opensil_dir)/xUSL/FCH/Common -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF +CPPFLAGS_romstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF + +romstage-y += opensil_console.c +romstage-y += romstage.c + +ramstage-y += acpi.c +ramstage-y += memmap.c +ramstage-y += opensil_console.c +ramstage-y += ramstage.c + +$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/opensil_console.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas +$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/romstage.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas + +$(obj)/ramstage/vendorcode/amd/opensil/genoa_poc/opensil_console.o: CFLAGS_ramstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas diff --git a/src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.inc b/src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.inc deleted file mode 100644 index f3ae3ef614..0000000000 --- a/src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.inc +++ /dev/null @@ -1,5 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ramstage-y += chip.c - -$(obj)/ramstage/vendorcode/amd/opensil/genoa_poc/mpio/chip.o: CFLAGS_ramstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas diff --git a/src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.mk b/src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.mk new file mode 100644 index 0000000000..f3ae3ef614 --- /dev/null +++ b/src/vendorcode/amd/opensil/genoa_poc/mpio/Makefile.mk @@ -0,0 +1,5 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ramstage-y += chip.c + +$(obj)/ramstage/vendorcode/amd/opensil/genoa_poc/mpio/chip.o: CFLAGS_ramstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas -- cgit v1.2.3