From 7fcd4d58ec7ea2da31c258ba9d8601f086d7f8d8 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Thu, 24 Aug 2023 15:12:19 +0200 Subject: device/device.h: Rename busses for clarity This renames bus to upstream and link_list to downstream. Signed-off-by: Arthur Heymans Change-Id: I80a81b6b8606e450ff180add9439481ec28c2420 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78330 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/vendorcode/amd/opensil/genoa_poc') diff --git a/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c b/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c index 9e9e886034..50e96c99e9 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c +++ b/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c @@ -129,7 +129,7 @@ static void per_device_config(MPIOCLASS_INPUT_BLK *mpio_data, struct device *dev struct vendorcode_amd_opensil_genoa_poc_mpio_config *const config) { static uint32_t slot_num; - const uint32_t domain = dev->bus->dev->path.domain.domain; + const uint32_t domain = dev->upstream->dev->path.domain.domain; const uint32_t devfn = dev->path.pci.devfn; printk(BIOS_DEBUG, "Setting MPIO port for domain 0x%x, PCI %d:%d\n", domain, PCI_SLOT(devfn), PCI_FUNC(devfn)); @@ -189,6 +189,6 @@ void configure_mpio(void) /* Find all devices with this chip that are directly below the chip */ for (struct device *dev = &dev_root; dev; dev = dev->next) if (dev->chip_ops == &vendorcode_amd_opensil_genoa_poc_mpio_ops && - dev->chip_info != dev->bus->dev->chip_info) - per_device_config(mpio_data, dev->bus->dev, dev->chip_info); + dev->chip_info != dev->upstream->dev->chip_info) + per_device_config(mpio_data, dev->upstream->dev, dev->chip_info); } -- cgit v1.2.3